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Process for automatic dynamic reloading of data flow processors (dfps) and units with two-or-three-dimensional programmable cell architectures (fpgas, dpgas, and the like)

  • US 6,477,643 B1
  • Filed: 07/10/2000
  • Issued: 11/05/2002
  • Est. Priority Date: 12/27/1996
  • Status: Expired due to Term
First Claim
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1. Process for dynamically reconfiguring configurable units with a two- or multidimensional cell arrangement (e.g., FPGAS, DPGAs, DFPS, or the like), characterized in thatthere are one or more switching tables, comprising one or more controllers and one or more configuration memories on the unit or connected thereto;

  • 2. configuration strings are transmitted from a switching table to a configurable element or a plurality of configurable elements of the unit, which establish a valid configuration;

    3. the PLU or the configurable element of the unit or units can write data into the configuration memory or memories of the switching table(s);

    4. the controller of the switching table(s) can recognize individual records as commands and can execute said commands;

    5 the controller can recognize and differentiate various events and thereupon executes a certain action;

    6. in response to the event or a combination of events, the controller moves the position pointer(s) and, if it has received configuration data rather than commands for the controller, sends this configuration data to the configurable element(s) defined in the configuration data;

    7. the controller can send one or more feedback messages to one or more PLU;

    8. a PLU or several PLUs can recognize and analyze this (these) signal(s);

    9. a PLU transmits data into the configuration memory of the switching table(s).

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