Method for complementary oxide transistor fabrication

• US 6,479,847 B2
• Filed: 05/07/1999
• Issued: 11/12/2002
• Est. Priority Date: 05/07/1999
• Status: Expired due to Fees

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Schrott, Alejandro G., Misewich, James A., Scott, Bruce A.
• Primary Examiner(s): Chaudhuri, Olik
• Assistant Examiner(s): Rao, Shrinivas H.
• Application Number:
  US09/306,509
• Publication Number:
  US 20020016030A1
• Time in Patent Office: 1,285 Days
• Field of Search: 257/295, 257/36-39, 257/410, 257/438
• US Class Current: 257/295
• CPC Class Codes: H01L 21/8238 Complementary field-effect transistors, e.g. CMOS
• CPC Class Codes: H10N 99/03 Devices using Mott metal-insulator transition, e.g. field effect transistors

Abstract

A method of manufacturing an integrated circuit device includes forming a laminated structure having a first side and a second side, the first side includes a first type Mott channel layer and the second side includes a second type Mott channel layer. A first source region and a first drain region is formed on the first side, a second source region and a second drain region is formed on the second side, a first gate region is formed on the second side, opposite the first source region and the first drain region and a second gate region is formed on the first side, opposite the second source region and the second drain region. The first source, the first drain and the first gate comprise a first type field effect transistor and the second source, the second drain and the second gate comprise a second type field effect transistor.

Claims

1. A laminated complementary field effect structure comprising:

a P-type Mott channel layer; and

N-type Mott channel layer adjacent said P-type Mott channel layer,

wherein said P-type Mott channel layer is complementary to said N-type Mott channel layer.

2. The structure in claim 1, further comprising:

a first source region, a first drain region and a first gate conductor region adjacent said P-type Mott channel layer; and

a second source region, a second drain region and a second gate conductor region adjacent said N-type Mott channel layer;

wherein said first source region, said first drain region, said first gate conductor region and said first Mott channel layer comprise a P-type field effect transistor; and

wherein said second source region, said second drain region, said second gate conductor region and said N-type Mott channel layer comprise a N-type field effect transistor electrically connected to said P-type field effect transistor.

3. The structure in claim 2, wherein said first source region and said first drain region comprise:

a first conductive layer adjacent said P-type Mott channel layer; and

a first insulator region in said first conductive layer opposite said first gate conductor,

said first source region and said first drain region being regions in said first conductive layer on opposite sides of said first insulator region.

4. The structure in claim 3, wherein said second source region and said second drain region comprise:

a second conductive layer adjacent said N-type Mott channel layer; and

a second insulator region in said second conductive layer opposite said second gate conductor,

said second source region and said second drain region being regions in said second conductive layer on opposite sides of said second insulator region.

5. The structure in claim 3, wherein said first gate conductor region and said second gate conductor region comprise:

a gate conductor layer insulated from and positioned between said P-type Mott channel layer and said N-type Mott channel layer, said first conductive layer and said second conductive layer respectively being on opposite sides of said P-type Mott channel layer and said N-type Mott channel layer from said gate conductor layer; and

a plurality of insulator regions in said gate conductor layer,

wherein said first gate conductor region is a region of said gate conductor layer between two of said insulator regions and is positioned opposite and between said first source region and said first drain region; and

wherein said second gate conductor region is a region of said gate conductor layer between two of said insulator regions and is positioned opposite and between said second source region and said second drain region.

6. The structure in claim 5, wherein said first conductive layer, said second conductive layer and said gate conductor layer comprise conductive oxide layers, and said P-type Mott transition layer is positioned on said first conductive layer;

said structure further comprising;

a first gate insulator layer positioned on said P-type Mott channel layer, said gate conductor layer being positioned on said first gate insulator layer;

a second gate insulator layer positioned on said gate conductor layer, said N-type Mott channel layer being positioned on said second gate insulator layer, and said second conductive layer being positioned on said N-type Mott channel layer.

7. The structure in claim 1, wherein said P-type Mott channel layer and said N-type Mott channel layer change conductivity in the presence of an electric field.

8. The structure in claim 2, wherein said P-type field effect transistor and said N-type field effect transistor are connected to form said complementary field effect transistor.

9. A complementary field effect transistor structure comprising:

a laminated structure having a first side and a second side, said first side including a P-type Mott channel layer and said second side including a N-type Mott channel layer;

a first conductive layer on said first side having a first source region and a first drain region;

a second conductive layer on said second side having a second source region and a second drain region; and

a gate conductor layer positioned between and insulated from said P-type Mott channel layer and said N-type Mott channel layer, said gate conductor layer having a first gate conductor region and a second gate conductor region,

wherein said first source region, said first drain region, said first gate conductor region and said P-type Mott channel layer comprise a P-type field effect transistor and said second source region, said second drain region, said second gate conductor region and said N-type Mott channel layer comprise a N-type field effect transistor.

10. The structure in claim 9, wherein said first source region and said first drain region comprise:

a first conductive layer adjacent said P-type Mott channel layer; and

a first insulator region in said first conductive layer opposite said first gate conductor,

said first source region and said first drain region being regions in said first conductive layer on opposite sides of said first insulator region.

11. The structure in claim 10, wherein said second source region and said second drain region comprise:

a second conductive layer adjacent said N-type Mott channel layer; and

a second insulator region in said second conductive layer opposite said second gate conductor,

said second source region and said second drain region being regions in said second conductive layer on opposite sides of said second insulator region.

12. The structure in claim 11, wherein said first gate conductor region and said second gate conductor region comprise:

a gate conductor layer insulated from and positioned between said P-type Mott channel layer and said N-type Mott channel layer, said first conductive layer and said second conductive layer respectively being on opposite sides of said P-type Mott channel layer and said N-type Mott channel layer from said gate conductor layer; and

a plurality of insulator regions in said gate conductor layer,

wherein said first gate conductor region is a region of said gate conductor layer between two of said insulator regions and is positioned opposite and between said first source region and said first drain region; and

wherein said second gate conductor region is a region of said gate conductor layer between two of said insulator regions and is positioned opposite and between said second source region and said second drain region.

13. The structure in claim 12, wherein said first conductive layer, said second conductive layer and said gate conductor layer comprise conductive oxide layers, and said P-type Mott transition layer is positioned on said first conductive layer;

said structure further comprising;

a first gate insulator layer positioned on said P-type Mott channel layer, said gate conductor layer being positioned on said first gate insulator layer;

a second gate insulator layer positioned on said gate conductor layer, said N-type Mott channel layer being positioned on said second gate insulator layer, and said second conductive layer being positioned on said N-type Mott channel layer.

14. The structure in claim 9, wherein said P-type Mott channel layer and said N-type Mott channel layer change conductivity in the presence of an electric field.

15. The structure in claim 9, wherein said P-type field effect transistor and said N-type field effect transistor are connected to form said complementary field effect transistor.

16. A complementary field effect transistor structure comprising:

a substrate having first and second portions;

a P-type Mott channel layer positioned over said first portion of said substrate; and

a N-type Mott channel layer positioned over said second portion of said substrate;

wherein said P-type Mott channel layer is complementary to said N-type Mott channel layer.

17. The structure in claim 16, wherein said P-type Mott channel layer and said N-type Mott channel layer change conductivity in the presence of an electric field.

18. The structure in claim 16, wherein said P-type Mott channel layer and said N-type Mott channel layer comprise complementary channel regions of a complementary field effect transistor.

19. The structure in claim 16, further comprising:

a first drain region and a first source region connected to said P-type Mott channel layer;

a first gate conductor region adjacent said P-type Mott channel layer;

a second drain region and a second source region connected to said N-type Mott channel layer; and

a second gate conductor region adjacent said N-type Mott channel layer,

wherein said first source region, said first drain region, said first gate conductor region and said P-type Mott channel layer comprise a P-type field effect transistor, and said second source region, said second drain region, said second gate conductor region and said N-type Mott channel layer comprise a N-type field effect transistor.

20. A laminated complementary field effect structure comprising:

a P-type Mott channel layer; and

a N-type Mott channel layer laterally adjacent said P-type Mott channel layer,

wherein said P-type Mott channel layer is complementary to said N-type Mott channel layer.

21. The structure in claim 20, further comprising:

a first source region, a first drain region and a first gate conductor region adjacent said P-type Mott channel layer; and

a second source region, a second drain region and a second gate conductor region adjacent said N-type Mott channel layer;

wherein said first source region, said first drain region, said fir gate conductor region and said first Mott channel layer comprise a P-type field effect transistor; and

wherein said second source region, said second drain region, said second gate conductor region and said N-type Mott channel layer comprise a N-type field effect transistor electrically connected to said P-type field effect transistor.

22. The structure in claim 21, wherein said first source region and said first drain region comprise:

a first conductive layer adjacent said P-type Mott channel layer; and

a first insulator region in said first conductive layer opposite said first gate conductor,

said first source region and said first drain region being regions in said first conductive layer on opposite sides of said first insulator region.

23. The structure in claim 22, wherein said second source region and said second drain region comprise:

a second conductive layer adjacent said N-type Mott channel layer; and

a second insulator region in said second conductive layer opposite said second gate conductor,

said second source region and said second drain region being regions in said second conductive layer on opposite sides of said second insulator region.

24. The structure in claim 22, wherein said first gate conductor region and said second gate conductor region comprise:

a gate conductor layer insulated from and positioned between said P-type Mott channel layer and said N-type Mott channel layer, said first conductive layer and said second conductive layer respectively being on opposite sides of said P-type Mott channel layer and said N-type Mott channel layer from said gate conductor layer; and

a plurality of insulator regions in said gate conductor layer,

wherein said first gate conductor region is a region of said gate conductor layer between two of said insulator regions and is positioned opposite and between said first source region and said first drain region; and

wherein said second gate conductor region is a region of said gate conductor layer between two of said insulator regions and is positioned opposite and between said second source region and said second drain region.

25. The structure in claim 24, wherein said first conductive layer, said second conductive layer and said gate conductor layer comprise conductive oxide layers, and said P-type Mott transition layer is positioned on said first conductive layer, said structure further comprising:

a first gate insulator layer positioned on said P-type Mott channel layer, said gate conductor layer being positioned on said first gate insulator layer;

a second gate insulator layer positioned on said gate conductor layer, said N-type Mott channel layer being positioned on sad second gate insulator layer, and said second conductive layer being positioned on said N-type Mott channel layer.

26. The structure in claim 20, wherein said P-type Mott channel layer and said N-type Mott channel layer change conductivity in the presence of an electric field.

27. The structure in claim 21, wherein said P-type field effect transistor and said N-type field effect transistor are connected to form said complementary field effect transistor.

28. A laminated complementary field effect structure comprising:

a P-type Mott channel layer; and

a N-type Mott channel layer completely over said P-type Mott channel layer,

wherein said P-type Mott channel layer is complementary to said N-type Mott channel layer.

29. The structure in claim 28, further comprising:

a first source region, a first drain region and a first gate conductor region adjacent said P-type Mott channel layer; and

a second source region, a second dr region and a second gate conductor region adjacent said N-type Mott channel layer;

wherein said first source region, said first drain region, said first gate conductor region and said first Mott channel layer comprise a P-type field effect transistor; and

wherein said second source region, said second drain region, said second gate conductor region and said N-type Mott channel layer comprise a N-type field effect transistor electrically connected to said P-type field effect transistor.

30. The structure in claim 29, wherein said first source region and said first drain region comprise:

a first conductive layer adjacent said P-type Mott channel layer; and

a first insulator region in said first conductive layer opposite said first gate conductor,

said first source region and said first drain region being regions in said first conductive layer on opposite sides of said first insulator region.

31. The structure in claim 30, wherein said second source region and said second drain region comprise:

a second conductive layer adjacent said N-type Mott channel layer; and

a second insulator region in said second conductive layer opposite said second gate conductor,

said second source region and said second drain region being regions in said second conductive layer on opposite sides of said second insulator region.

32. The structure in claim 30, wherein said first gate conductor region and said second gate conductor region comprise:

a gate conductor layer insulated from and positioned between said P-type Mott channel layer and said N-type Mott channel layer, said first conductive layer a-ad said second conductive layer respectively being on opposite sides of said P-type Mott channel layer and said N-type Mott channel layer from said gate conductor layer; and

a plurality of insulator regions in said gate conductor layer,

wherein said first gate conductor region is a region of said gate conductor layer between two of said insulator regions and is positioned opposite and between said first source region and said first drain region; and

wherein said second gate conductor region is a region of said gate conductor layer between two of said insulator regions and is positioned opposite and between said second source region and said second drain region.

33. The structure in claim 32, wherein said first conductive layer, said second conductive layer and said gate conductor layer comprise conductive oxide layers, and said P-type Mott transition layer is positioned on said first conductive layer;

said structure further comprising;

a first gate insulator layer positioned on said P-type Mott channel layer, said gate conductor layer being positioned on said first gate insulator layer;

a second gate insulator layer positioned on said gate conductor layer, said N-type Mott channel layer being positioned on said second gate insulator layer, and said second conductive layer being positioned on said N-type Mott channel layer.

34. The structure in claim 28, wherein said P-type Mott channel layer and said N-type Mott channel layer change conductivity in the presence of an electric field.

35. The structure in claim 29, wherein said P-type field effect transistor and said N-type field effect transistor are connected to form said complementary field effect transistor.