Blocked stepped address voltage for micromechanical devices
First Claim
1. A method of addressing an array of spatial light modulator elements, comprising the steps of:
- dividing the array into blocks of elements;
providing reset lines to each of the blocks of elements, separate from the other blocks of elements;
providing address voltage supplies to each of the blocks of elements, separate from the other blocks of elements;
sending address data to each of the blocks independent of sending address data to the other blocks;
resetting each of the blocks to respond to the address data independent of the other blocks; and
stepping address voltage to each of the blocks of elements, such that only the blocks of elements that are being reset receive the stepped address voltage.
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Accused Products
Abstract
A method of addressing an array of spatial light modulator elements. The method divides the array into blocks of elements, provides reset lines (MRST) to each of the block of elements, separate from the other blocks of elements, as well as address voltage supplies (VCCADDR) to each of the block of elements, separate from the other blocks of elements, addresses data to each of the blocks independent of the other blocks, resets each of the blocks, and steps address voltage to each of the block, where only blocks that are being reset receive the stepped address voltage. A spatial light modulator array (32) is also provided that has a layout to facilitate the method, including internal or external circuitry (34) to provide control of the stepped addressing voltages.
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Citations
17 Claims
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1. A method of addressing an array of spatial light modulator elements, comprising the steps of:
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dividing the array into blocks of elements;
providing reset lines to each of the blocks of elements, separate from the other blocks of elements;
providing address voltage supplies to each of the blocks of elements, separate from the other blocks of elements;
sending address data to each of the blocks independent of sending address data to the other blocks;
resetting each of the blocks to respond to the address data independent of the other blocks; and
stepping address voltage to each of the blocks of elements, such that only the blocks of elements that are being reset receive the stepped address voltage. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A spatial light modulator comprising an array of individually addressable elements on one substrate divided into blocks, comprising:
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reset lines for each block, such that each of the reset lines is independent of other reset lines;
address voltage supplies for each block, such that each of the address voltage supplies is independent of other address voltage supplies; and
logic circuitry for determining which of the blocks is being reset and for stepping the address voltage supply for the blocks being reset. - View Dependent Claims (8)
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9. A method of addressing an array of spatial light modulator elements, comprising the steps of:
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dividing the array into blocks of elements;
providing reset lines to each of the blocks of elements, separate from the other blocks of elements;
providing address voltage supplies to each of the blocks of elements, separate from the other blocks of elements, said address voltage supplies having an address voltage line shared by each pair of adjacent row of the array;
sending address data to each of the blocks independent of sending address data to the other blocks;
resetting each of the blocks to respond to the address data independent of the other blocks; and
stepping an address voltage to each of the blocks of elements, such that only the blocks of elements that are being reset receive the stepped address voltage. - View Dependent Claims (10, 11, 12, 13)
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14. A spatial light modulator comprising an array of individually addressable elements on one substrate divided into blocks, comprising:
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reset lines for each block, such that each of the reset lines is independent of other reset lines; and
address voltage supplies for each block, such that each of the address voltage supplies is independent of other address voltage supplies, said address supplies having an address voltage line shared between each pair of adjacent rows of each block. - View Dependent Claims (15, 16, 17)
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Specification