Performance monitor synchronization in a multiprocessor system
First Claim
1. A method of synchronizing performance monitors in the multiprocessor system including a lead processor and at least one slave processor, comprising:
- informing the slave processor that a synchronization signal is forthcoming;
waiting for an acknowledgment indicating the slave processor is ready to receive the synchronization signal;
responsive to the slave processor'"'"'s acknowledgment, sending the synchronization signal to the slave processor; and
setting the lead processor'"'"'s performance monitors when the synchronization signal is sent and setting the slave processor'"'"'s performance monitors when the synchronization signal is received by the slave processor.
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Accused Products
Abstract
A method, system, and computer readable medium for synchronizing performance monitors in the multiprocessor system are disclosed. The system includes a lead processor and at least one slave processor. The method includes informing the slave processor that a synchronization signal is forthcoming and waiting for an acknowledgment indicating that the slave processor is ready to receive the synchronization signal. In response to the slave processor'"'"'s acknowledgment, the method includes sending the synchronization signal to the slave processor. The lead processor'"'"'s performance monitors are set when the synchronization signal is sent and the slave processor'"'"'s performance monitors are sent when the synchronization signal is received by the slave processor. In one embodiment, informing the slave processor that a synchronization signal is forthcoming is achieved by issuing a first inter-processor interrupt. In one embodiment, the sending of the synchronization signal is achieved by issuing a second interprocessor interrupt. In one configuration, waiting for the acknowledgment is accomplished by executing a spin loop with the lead processor. In one embodiment, the values set in the lead processor performance monitors are offset from the value set in the slave processor performance monitors, preferably by an offset that is indicative of the delay required for the synchronization signal to propagate from the lead processor to the slave processor.
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Citations
24 Claims
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1. A method of synchronizing performance monitors in the multiprocessor system including a lead processor and at least one slave processor, comprising:
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informing the slave processor that a synchronization signal is forthcoming;
waiting for an acknowledgment indicating the slave processor is ready to receive the synchronization signal;
responsive to the slave processor'"'"'s acknowledgment, sending the synchronization signal to the slave processor; and
setting the lead processor'"'"'s performance monitors when the synchronization signal is sent and setting the slave processor'"'"'s performance monitors when the synchronization signal is received by the slave processor. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A data processing system, comprising;
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a set of processors, including a lead processor and a slave processor;
storage means accessible to the set of processors;
input means and display means connected to the set of processors;
wherein the storage means is configured with a set of computer instructions executable by the set of processors, the instructions comprising;
means for informing the slave processor that a synchronization signal is forthcoming;
means for waiting for an acknowledgment indicating the slave processor is ready to receive the synchronization signal;
responsive to the slave processor'"'"'s acknowledgment, means for sending the synchronization signal to the slave processor; and
means for setting the lead processor'"'"'s performance monitors when the synchronization signal is sent and setting the slave processor'"'"'s performance monitors when the synchronization signal is received by the slave processor. - View Dependent Claims (10, 11, 12, 13, 14, 15, 16)
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17. A computer program product, comprising a computer readable medium configured with a set of computer executable instructions, the instructions comprising:
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means for informing the slave processor that a synchronization signal is forthcoming;
means for waiting for an acknowledgment indicating the slave processor is ready to receive the synchronization signal;
responsive to the slave processor'"'"'s acknowledgment, means for sending the synchronization signal to the slave processor; and
means for setting the lead processor'"'"'s performance monitors when the synchronization signal is sent and setting the slave processor'"'"'s performance monitors when the synchronization signal is received by the slave processor. - View Dependent Claims (18, 19, 20, 21, 22, 23, 24)
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Specification