Semiconductor device structure with hydrogen-rich layer for facilitating passivation of surface states

• US 6,483,172 B1
• Filed: 04/28/2000
• Issued: 11/19/2002
• Est. Priority Date: 03/09/1998
• Status: Expired due to Term

• Current Assignee: Infineon Technologies AG
• Original Assignee: International Business Machines Corporation, Siemens AG
• Inventors: Hauf, Manfred, Cote, Donna Rizzone, Cote, William Joseph, Nguyen, Son Van, Levy, Max G., Kirchhoff, Markus
• Primary Examiner(s): Picardat, Kevin M.
• Application Number:
  US09/562,217
• Time in Patent Office: 935 Days
• Field of Search: 257/639, 257/640, 257/649, 257/760, 257/750, 438/778, 438/786, 438/791
• US Class Current: 257/639
• CPC Class Codes: H01L 21/0214 the material being a silicon oxynitride, e.g. SiON or SiON:H
• CPC Class Codes: H01L 21/0217 the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz H01L21/02126 and H01L21/0214 take precedence
• CPC Class Codes: H01L 21/02211 the compound being a silane, e.g. disilane, methylsilane or chlorosilane
• CPC Class Codes: H01L 21/02274 in the presence of a plasma [PECVD]
• CPC Class Codes: H01L 21/02304 formation of intermediate layers, e.g. buffer layers, layers to improve adhesion, lattice match or diffusion barriers
• CPC Class Codes: H01L 21/28176 with a treatment, e.g. annealing, after the formation of the definitive gate conductor
• CPC Class Codes: H01L 21/3003 Hydrogenation or deuterisation, e.g. using atomic hydrogen from a plasma
• CPC Class Codes: H01L 21/3145 formed by deposition from a gas or vapour
• CPC Class Codes: H10B 12/038 the capacitor being in a trench in the substrate
• CPC Class Codes: H10B 12/05 Making the transistor

Abstract

A process for fabricating a device including the step of forming a structure for facilitating the passivation of surface states is disclosed. The structure comprises an oxynitride layer formed as part of the device structure. The oxynitride facilitates the passivation of surface states when heated.

Claims

1. A semiconductor device structure having a gate, said structure comprising:

a silicon substrate;

a dielectric layer on said substrate forming a gate dielectric;

a composite stacked gate electrode comprising a semiconductor material layer and a silicide layer on said dielectric layer;

a spacer layer adjacent to said stacked gate electrode; and

a hydrogen-rich layer on said silicon substrate and gate electrode.

2. The structure of claim 1, wherein said hydrogen-rich layer comprises a hydrogen-rich silicon nitride layer.

3. The structure of claim 1, wherein said hydrogen-rich silicon nitride layer has a hydrogen content of about 5% to about 39%.

4. The structure of claim 1, wherein the hydrogen-rich layer comprises a hydrogen-rich silicon oxynitride layer.

5. The structure of claim 4, wherein said hydrogen-rich silicon oxynitride layer has a hydrogen content of about 5% to about 39%.

6. The structure of claim 1, further comprising:

a shallow trench isolation region in the silicon substrate.

7. The structure of claim 1, further comprising:

a cap silicon nitride layer on said gate electrode.

8. The structure of claim 1, wherein said doped semiconductor material comprises polysilicon.

9. The structure of claim 8, wherein said silicide comprises tungsten silicide, further comprising:

an adhesion layer over the tungsten silicide.

10. The structure of claim 9, wherein said adhesion layer comprises silicon.

11. The structure of claim 1, wherein said silicide is a material selected from the group consisting of tungsten silicide, molybdenum silicide, tantalum silicide, titanium silicide, and cobalt silicide.