Low power mode and feedback arrangement for a switching power converter

• US 6,483,281 B2
• Filed: 01/09/2002
• Issued: 11/19/2002
• Est. Priority Date: 02/11/2000
• Status: Expired due to Fees

• Current Assignee: Champion Microelectronic Corporation
• Original Assignee: Champion Microelectronic Corporation
• Inventors: Hwang, Jeffrey H.
• Primary Examiner(s): HAN, YOUNGHUIE JESSICA
• Application Number:
  US10/043,624
• Publication Number:
  US 20020057082A1
• Time in Patent Office: 314 Days
• Field of Search: 323/222, 323/282, 323/284, 323/299, 323/301, 323/303
• US Class Current: 323/299
• CPC Class Codes: H02M 1/0032 Control circuits allowing low power mode operation, e.g. in standby mode
• CPC Class Codes: H02M 1/0048 Circuits or arrangements for reducing losses using snubbers H02M1/34
• CPC Class Codes: H02M 1/088 for the simultaneous control of series or parallel connected semiconductor devices
• CPC Class Codes: H02M 3/158 including plural semiconductor devices as final control devices for a single load
• CPC Class Codes: H02M 3/1584 with a plurality of power processing stages connected in parallel
• CPC Class Codes: Y02B 70/10 Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

A low power mode and feedback arrangement for a switching power converter. Two or more main power switches, such as transistors, transfer energy from a supply to load by their opening and closing. When the load requires a relatively low power level, this condition is detected. In response, one or more of the transistor switches is disabled from switching and the reduced power requirements of the load are handled by the remaining one or more transistor switches. As a result, switching losses are reduced. This is because parasitic gate capacitance and on-resistance associated with the disabled switches no longer consume power from the power source. The invention provides significant efficiency advantages during periods when the load draws a low level of power. This is especially useful for battery-powered devices which may operate in a low power mode for extended periods of time, such as standby mode as in a portable telephone. This is because the prevention of power loss in may contribute considerably to operating time before battery re-charging is needed. However, when additional power is required, one or more previously disabled switches may be brought back into play to ensure that the power requirements of the load are met. In an audio amplifier having a H-bridge arrangement for providing a differential output signal, the invention also provides a feedback path from only one side of the load. This reduces distortion associated with open-ended operation.

Claims

1. A switching amplifier for receiving an input signal and for generating and output signal representative of the input signal comprising:

a first pair of transistor switches for alternately raising and lowering a voltage potential of a first terminal of a reactive element upon switching of the first pair of transistor switches;

a second pair of transistor switches for alternately raising and lowering a voltage potential of the first terminal of the reactive element upon switching of the second pair of transistor switches;

a switch controller for controlling switching of the first and second pairs of transistor switches in accordance with the input signal for forming the output signal at a second terminal of the reactive element; and

a low signal level detector coupled to the second pair of transistor switches for disabling the second pair of transistor switches from switching upon detection of a low input signal level condition.

2. The switching amplifier according to claim 1, wherein the input signal is an audio signal.

3. The switching amplifier according to claim 1, further comprising a speaker coupled to receive the output signal.

4. The switching amplifier according to claim 1, further comprising one or more additional pairs of transistor switches for alternately raising and lowering a voltage potential of the first terminal of the reactive element, each additional pair being selectively disabled by the low signal level detector upon detection of a corresponding low input signal level condition.

5. The switching amplifier according to claim 1, wherein the transistor switches of the first pair have substantially equal current carrying capacities which are substantially different from current carrying capacities of the transistor switches of the second pair.

6. The switching amplifier according to claim 1, wherein the low signal level detector detects the low input signal level condition by monitoring the input signal.

7. The switching amplifier according to claim 1, wherein the low signal level detector detects the low input signal level condition by monitoring an error signal representative of a difference between the input signal and a reference level.

8. The switching amplifier according to claim 1, wherein the low signal level detector comprises a window comparator.

9. The switching amplifier according to claim 8, wherein the window comparator has a hysteretic transfer characteristic.

10. The switching amplifier according to claim 1, further comprising a feedback path from a terminal of the reactive element to the switch controller for limiting the output signal.

11. The switching amplifier according to claim 1, wherein the first pair of transistor switches are actively switching when the low input signal level condition is not detected.

12. The switching amplifier according to claim 1, wherein the first pair of transistor switches are disabled by the low signal level detector when the low input signal level condition is not detected.