Single chip CMOS transmitter/receiver and method of using same

• US 6,483,355 B1
• Filed: 11/13/2000
• Issued: 11/19/2002
• Est. Priority Date: 07/24/1998
• Status: Expired due to Term

• Current Assignee: GCT Semiconductor Incorporated
• Original Assignee: GCT Semiconductor Incorporated
• Inventors: Jeong, Deog-Kyoon, Lee, Kyeongho, Park, Joonbae, Kim, Wonchan
• Primary Examiner(s): LE, DINH THANH
• Application Number:
  US09/709,637
• Time in Patent Office: 736 Days
• Field of Search: 327/350, 327/359, 327/105, 327/100, 327/113, 327/355, 327/226.2, 455/217, 455/226.1, 330/254, 375/259, 375/316, 375/345
• US Class Current: 327/113
• CPC Class Codes: H03F 2200/372 Noise reduction and elimination in amplifier
• CPC Class Codes: H03H 11/22 providing two or more phase shifted output signals, e.g. n-phase output
• CPC Class Codes: H03H 2011/0494 Complex filters
• CPC Class Codes: H03K 9/00 Demodulating pulses which have been modulated with a continuously-variable signal
• CPC Class Codes: H03L 7/0891 the up-down pulses controlling source and sink current generators, e.g. a charge pump
• CPC Class Codes: H03L 7/0995 the oscillator comprising a ring oscillator
• CPC Class Codes: H03L 7/1974 for fractional frequency division
• CPC Class Codes: H04B 1/18 Input circuits, e.g. for coupling to an antenna or a transmission line coupling networks between antennas or lines and receivers independent of the nature of the receiver H03H
• CPC Class Codes: H04B 1/28 the receiver comprising at least one semiconductor device having three or more electrodes
• CPC Class Codes: H04B 1/40 Circuits
• CPC Class Codes: H04B 1/403 using the same oscillator for generating both the transmitter frequency and the receiver local oscillator frequency

Abstract

A single chip RF communication system and method is provided including a transmitter and a receiver. The RF communication system in accordance with the present invention can include an antenna that receives/transmits RF signals, a PLL that generates multi-phase clock signals having a frequency different from a carrier frequency and a reference signal having the carrier frequency, a demodulation-mixer that mixes the received RF signals with the multi-phase clock signals having the frequency different from the carrier frequency to output signals having a frequency reduced relative to the carrier frequency, two stage amplification that amplifies a selected channel signal to a required dynamic level, and an A/D converting unit for converting the RF signals from the mixing unit into digital signals. The two stage amplification can provide the selected channel signal with sufficient gain, even when an adjacent channel signal is output by the demodulation mixer with greater amplitude or power.

Claims

1. A direct conversion communication system, comprising:

a receiver unit that receives RF signals including selected RF signals, wherein the selected RF signals have a predetermined carrier frequency;

a demodulation-mixer that mixes the selected RF signals with clock signals and outputs baseband signals; and

a first AGC amplifier that amplifies the baseband signals until at least one of the baseband signals reaches a linearity limit, and

a second AGC amplifier that selectively amplifies a baseband signal output from the first AGC amplifier which lies within a desired channel, and filters another one of the baseband signals output from the first AGC amplifier which does not lie within the desired channel.

2. The communications system of claim 1, wherein second AGC amplifier amplifies the baseband signal within said desired channel to a prescribed amplitude which is greater than a required dynamic range of the communications system.

3. The communications system of claim 2, wherein an adjacent channel in the baseband signals has a greater power level than the baseband signal in the desire channel, and the second AGC amplifier is a merged-gain filter.

4. The communication system of claim 1, further comprising:

a RF filter coupled to the receiver unit that filters the selected RF signals to output filtered RF signals;

a low noise amplifier coupled to the RF filter that amplifies the filtered RF signals with a gain;

an A/D converting unit that converts the baseband signals into digital signals; and

a digital signal processor that receives the digital signals.

5. The direct conversion communication system of claim 1, wherein the AGC loop includes:

a plurality of VGA stages coupled to receive a baseband signal from the demodulation-mixer and provide amplification;

a plurality of cascaded DC-offset canceling loops coupled to each of the VGA stages; and

a feedback loop coupled to receive an output signal of the AGC loop to provide a feedback signal to the plurality of VGA stages.

6. The direct conversion communication system of claim 5, wherein the feedback loop includes:

a peak detector coupled to receive an AGC output signal and detect a peak voltage;

a charge pump coupled to receive a peak detector output signal; and

a loop filter, coupled to receive and filter a charge pump output signal and to provide the feedback signal to the plurality of VGA stages.

7. The direct conversion communication system of claim 5, wherein the second AGC filters all baseband signals having an amplitude greater than the desired channel signal to at least a prescribed level below the linearity limit while amplifying the signal in the desired channel to the linearity limit.

8. A single chip RE communication system, comprising:

a receiver that receives RF signals;

a PLL, for generating a plurality of 2N-phase clock signals having a substantially identical frequency 2*f₀/N, wherein f₀ is the carrier frequency, and wherein N is a positive integer;

a demodulation mixer that mixes the RF signals from the receiver with the plurality of 2N-phase clock signals from the PLL to output RF signals having a frequency reduced relative to the carrier frequency f₀, wherein the demodulation mixer comprises a plurality of two input mixers;

an AGC loop coupled to the demodulation-mixer;

a gain-merged filter coupled to the AGC loop; and

an A/D converting unit coupled to the gain-merged filter that converts the RF signals from the demodulation mixer into digital signals.

9. The communication system of claim 8, wherein at least two of the plurality of 2N-phase clock signals are combined to demodulate at least one each of an I carrier frequency signal and a Q carrier frequency signal.

10. The single chip RF communication system of claim 8, further comprising:

a RF filter coupled to the receiver unit that filters the selected RF signals to output filtered RF signals; and

a low noise amplifier coupled to the RF filter that amplifies the filtered RF signals with a gain.

11. The single chip RF communication system of claim 10, further comprising:

an A/D converting unit that converts the baseband signals into digital signals; and

a digital signal processor that receives the digital signals.

12. The single chip RF communication system of claim 8, wherein the PLL generates 12-phase LO signals for seven different channel frequencies.

13. The single-chip RF communication system of claim 8, wherein the AGC loop includes:

a plurality of VGA stages coupled to receive a baseband signal from the demodulation-mixer and provide amplification;

a plurality of cascaded DC-offset canceling loops coupled to each of the VGA stages; and

a feedback loop coupled to receive an output signal of the AGC loop to provide a feedback signal to the plurality of VGA stages.

14. The single-chip RF communication system of claim 13, wherein the feedback loop includes:

a peak detector coupled to receive an AGC output signal and detect a peak voltage;

a charge pump coupled to receive a peak detector output signal; and

a loop filter, coupled to receive and a filter a charge pump output signal and to provide the feedback signal to the plurality of VGA stages.

15. The single-chip RF communication system of claim 8, wherein the gain-merged filter includes four third-order G_m-C elliptic channel selection filters.

16. The single-chip RF communication system of claim 8, further comprising:

a DC-offset cancelling loop coupled to the gain-merged filter; and

a feedback loop coupled to receive an output signal of the gain-merged filter to provide at least one feedback signal to an input of the gain-merged filter.

17. The single-chip RF communication system of claim 16, wherein the feedback loop comprises:

a peak detector coupled to receive the output signal of the gain-merged filter and detect a peak voltage;

a charge pump coupled to receive a peak detector output signal; and

a loop filter, coupled to receive and filter a charge pump output signal and to provide the at least one feedback signal to the input of the gain-merged filter.

18. A method of operating a RF communication system, comprising:

receiving RF signals including selected RF signals, wherein the selected RF signals have a predetermined carrier frequency;

generating more than two multi-phase clock signals having a substantially identical frequency different from the predetermined carrier frequency;

mixing the selected RF signals with the more than two multi-phase clock signals to output demodulated signals having a frequency reduced from the carrier frequency, wherein several of the more than two multi-phase clock signals are mixed to demodulate one of a first carrier frequency signal and a second carrier frequency signal;

amplifying the demodulated signals until one of a desired channel and an adjacent channel reach a linearity limit; and

amplifying and filtering the adjacent channel and amplifying the desired channel to a desired dynamic range.

19. The method of claim 18, wherein the adjacent channel has a greater power level than the desired channel in the demodulated selected signals.

20. The method of claim 18, further comprising:

RF filtering the selected RF signals to produce filtered selected signals;

amplifying the filtered selected signals with a gain;

low pass filtering the demodulated selected signals having the frequency reduced to baseband;

A/D converting the low pass filtered frequency reduced selected signals into digital signals; and

digitally processing the digital signals.

21. The method of claim 18, wherein the steps of mixing the received signals, amplifying the demodulated selected signals, and amplifying and filtering the adjacent channel and the desired channel are performed for both an I-channel and a Q-channel.

22. A RF communication system, comprising:

means for receiving RF signals including selected RF signals, wherein the selected RF signals have a predetermined carrier frequency;

means for generating two N-phase clock signals having a substantially identical frequency different from the predetermined carrier frequency;

means for mixing the selected RF signals with the two N-phase clock signals to output two demodulated signals;

where a first demodulated signal is for the I-channel and a second demodulated signal is for the Q-channel;

means for amplifying the first and second demodulated signals until one of a desired channel and an adjacent channel reach a linearity limit; and

means for amplifying and filtering the adjacent channel and amplifying the desired channel to a desired dynamic range.

23. The RF communication system of claim 22, wherein the means for amplifying comprises:

a plurality of VGA means coupled in series for amplifying one of the first and second demodulated signals;

a plurality of cascaded DC-offset canceling means coupled to each of the corresponding plurality of VGA means; and

feedback means coupled to receive an output-signal from a final VGA means and for providing a feedback signal to an input of any one of the plurality of VGA means.