Hierarchical texture cache
First Claim
Patent Images
1. A processor system comprising:
- a central processing unit having a primary level cache associated therewith;
a graphics unit having a primary level texture cache associated therewith, said primary level texture cache used to store texture data used by said graphics unit;
a secondary level cache associated with and shared by said central processing unit and said graphics unit, wherein a selected portion of said secondary level cache is used to store said texture data used by said graphics unit.
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Abstract
A dynamically configurable portion of a cache shared between central processing and graphics units in a highly integrated multimedia processor is engaged as a secondary level in a hierarchical texture cache architecture. The graphics unit includes a small multi-ported L1 texture cache local to its 2D/3D pipeline that is backed by the relatively large, single ported portion of the shared cache. Leveraging the shared cache as a secondary level texture cache reduces system memory bandwidth and die size without significant sacrifice in performance.
80 Citations
20 Claims
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1. A processor system comprising:
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a central processing unit having a primary level cache associated therewith;
a graphics unit having a primary level texture cache associated therewith, said primary level texture cache used to store texture data used by said graphics unit;
a secondary level cache associated with and shared by said central processing unit and said graphics unit, wherein a selected portion of said secondary level cache is used to store said texture data used by said graphics unit. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A highly integrated multimedia processor having tightly coupled functional units and a system memory interface comprising:
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a central processing unit having a primary level cache associated therewith;
a graphics unit having a primary level texture cache associated therewith, said primary level texture cache used to store texture data used by said graphics unit;
a secondary level cache associated with and shared by said central processing unit and said graphics unit, wherein a selected portion of said secondary level cache is used to store said texture data used by said graphics unit. - View Dependent Claims (11, 12, 13, 14, 15, 16, 17, 18)
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19. In a processor having a secondary level cache shared between a central processing unit and a graphics unit, the graphics unit having a primary level texture cache associated therewith, a method of providing hierarchical texture caching comprising steps of:
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configuring a selected portion of the secondary level cache as a secondary level texture cache; and
,backing the primary level texture cache with the secondary level texture cache when a miss occurs in the primary level texture cache. - View Dependent Claims (20)
counting cache misses by the central processing unit in the secondary level cache, wherein the cache misses are caused by the graphics unit evicting data in the secondary level cache in order to write texture data in the secondary level cache;
comparing a count value stored in the statistics counter to a threshold value; and
reducing the size of the selected portion of the secondary level cache if the count value exceeds the threshold value.
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Specification