Processing for improved performance and reduced pilot

• US 6,483,868 B2
• Filed: 11/13/2001
• Issued: 11/19/2002
• Est. Priority Date: 05/14/1998
• Status: Expired due to Term

• Current Assignee: Interdigital Technology Corporation (InterDigital, Inc.)
• Original Assignee: Interdigital Technology Corporation (InterDigital, Inc.)
• Inventors: Mesecher, David K., Özlütürk, Fatih M., Jacques, Alexander M.
• Primary Examiner(s): Pham, Chi
• Assistant Examiner(s): Tran, Khai
• Application Number:
  US10/008,411
• Publication Number:
  US 20020039382A1
• Time in Patent Office: 371 Days
• Field of Search: 375/152, 375/147, 375/150, 375/376, 375/375, 375/341, 370/320, 370/342, 370/335, 370/441
• US Class Current: 375/152
• CPC Class Codes: H04B 1/30 for homodyne or synchrodyne receivers demodulator circuits H03D1/22
• CPC Class Codes: H04B 1/707 using direct sequence modulation
• CPC Class Codes: H04B 1/70755 Setting of lock conditions, e.g. threshold
• CPC Class Codes: H04B 1/7085 using a code tracking loop, e.g. a delay-locked loop
• CPC Class Codes: H04B 1/7093 Matched filter type
• CPC Class Codes: H04B 1/7115 Constructive combining of multi-path signals, i.e. RAKE receivers
• CPC Class Codes: H04B 2201/70701 featuring pilot assisted reception
• CPC Class Codes: H04L 2027/0067 Phase error detectors
• CPC Class Codes: H04L 25/0212 of impulse response
• CPC Class Codes: H04L 27/0014 Carrier regulation of chaotic carriers H04L27/001; for multicarrier receivers H04L27/2657
• CPC Class Codes: Y02D 30/70 in wireless communication networks

Abstract

A digital spread spectrum communication system employing pilot-aided coherent multipath demodulation effects a substantial reduction in global-pilot and assigned-pilot overheads. The system and method uses a QPSK-modulated data signal whereby the modulated data is removed and the recovered carrier is used for channel amplitude and phase estimation. The resulting signal has no data modulation and is used as a pseudo-pilot signal. In conjunction with the pseudo-pilot signal, a multiple-input phase-locked loop is employed further eliminating errors due to carrier-offset by using a plurality of pseudo-pilot signals. A pilot signal is required to resolve absolute phase ambiguity, but at a greatly reduced magnitude.

Claims

1. A receiver for use in a communication station of a CDMA system wherein a plurality of communication stations communicate with each other over a CDMA air interface using a plurality of channels and a pilot signal for carrier-offset recovery during reception, the receiver comprising:

an adaptive matched filter for receiving demodulated CDMA communication signals producing a filtered signal by using a weighting signal;

a rake receiver for receiving the demodulated CDMA communication signals and a pseudo-noise signal generated for a selected channel and producing a filter weighting signal;

means for defining the filter weighting signal with a correction signal, said correction signal to produce the weighting signal used by said adaptive matched filter;

a channel despreader for said selected channel coupled to said adaptive matched filter output for despreading said filtered signal using the pseudo-noise signal generated for said selected channel to produce a despread channel signal of said selected channel;

a pilot channel despreader for a pilot channel coupled to said adaptive matched filter output for despreading said filtered signal using a pseudo-noise signal generator for said pilot channel to produce a despread pilot signal of said pilot channel;

a hard decision processor in association with a complex conjugate processor for receiving the despread channel signal of said selected channel and producing said correction signal; and

a phase-locked loop utilizing at least said despread pilot signal for producing a phase correction signal which is applied to produce phase-corrected channel signals.

2. The receiver according to claim 1 further comprising a plurality of channel despreaders, each coupled to said adaptive matched filter output for despreading said filtered signal each using an associated pseudo-noise signal generator to produce a plurality of despread channel signals.

3. The receiver according to claim 2 wherein the number of channel despreaders is three.

4. The receiver according to claim 2 wherein said phase-locked loop phase correction signal is at a chip level and is applied to said demodulated CDMA communication signals.

5. The receiver according to claim 2 wherein each of the plurality of channels is a complex, bi-phase modulated signal comprised of symbols including in-phase and quadrature components representing data, said hard decision processor compares each despread channel signal symbol to one of four possible quadrature constellation points and assigns each of said symbols to a nearest constellation point, and said complex conjugate processor derotates each of said symbols by determining a complex conjugate of each of said assigned points to produce said correction signal.

6. The receiver according to claim 2 wherein said phase-locked loop further comprises a plurality of inputs corresponding with said plurality of channel despreaders.

7. The receiver according to claim 6 wherein said phase-locked loop further comprises:

a hard decision processor in association with said complex conjugate processor with a local feedback loop for each of said corresponding channel despreader inputs to produce an error estimate signal for a respective channel signal;

each said error estimate signal and said despreader pilot signal coupled to an inverse tangent processor to produce a corresponding phase correction signal; and

said respective channel phase correction signal and pilot phase correction signal coupled to a maximum likelihood combiner producing a combination correction signal coupled to an integrator to produce said phase correction signal.

8. The receiver according to claim 7 wherein the number of channel despreaders is three.

9. The receiver according to claim 1 wherein said phase-locked loop phase correction signal is at a symbol level and is applied to said filter weighting signal and to said despread channel signals of said channel and pilot channel despreaders.

10. The receiver according to claim 9 further comprising a plurality of channel despreaders, each coupled to said adaptive matched filter output for despreading said filtered signal using an associated pseudo-noise signal generator to produce a plurality of despread channel signals.

11. The receiver according to claim 10 wherein the number of channel despreaders is three.

12. The receiver according to claim 10 wherein said phase-locked loop further comprises a plurality of signal inputs corresponding with said plurality of channel despreaders.

13. The receiver according to claim 12 wherein said phase-locked loop further comprises:

a hard decision processor in association with a complex conjugate processor with a local feedback loop for each of said plurality of signal inputs, each producing an error estimate for a respective channel signal;

each of said channel error estimates and said despreader pilot signal coupled to an inverse tangent processor outputting a channel phase correction signal; and

said channel phase correction signal and said pilot phase correction signal coupled to a maximum likelihood combiner producing a combination correction signal coupled to an integrator to produce said phase correction signal.

14. The receiver according to claim 13 wherein the number of channel despreaders is three.

15. A method of receiving at least one of a plurality of channels over a CDMA air interface using a reduced magnitude pilot signal for carrier-offset recovery during reception wherein a plurality of communication stations communicate with each other comprising the steps:

receiving demodulated CDMA communication signals;

filtering said received demodulated CDMA communication signals with an adaptive matched filter to produce a filtered signal by using a weighting signal;

producing a filter weighting signal with a rake receiver using said demodulated CDMA communication signals and a pseudo-noise signal generated for a selected channel;

refining said filter weighting signal with a correction signal;

despreading said selected channel from said filtered signal using the pseudo-noise signal for said selected channel to produce a despread channel signal of said selected channel;

despreading a pilot channel from said filtered signal using a pseudo-noise signal generated for said pilot channel to produce a despread pilot signal of said pilot channel;

processing said selected despread channel signal with a hard decision processor in association with a complex conjugate processor to produce said correction signal; and

generating a phase correction signal from said despread pilot signal with a phased-locked loop to phase-correct said selected channel signal.

16. The method according to claim 15 wherein said phase correction signal is at a chip level.

17. The method according to claim 16 wherein the step of despreading said selected channel also includes despreading a plurality of channels to produce despread channel signals.

18. The method according to claim 17 wherein said step of generating a phase correction signal further includes the steps of:

assigning a received symbol to one of four possible quadrature constellation points for said despread selected channel signal and each of said despread channel signals;

derotating each of said assigned symbols for said despread selected channel signal and each of said despread channel signals by determining the complex conjugate of each of said assigned points to produce respective error estimate signals;

coupling each of said error estimate signals and said despread pilot signal to inverse tangent processors to produce corresponding phase correction signals; and

combining said channel phase correction signal and said pilot phase correction signal to produce said phase correction signal.

19. The method according to claim 15 wherein said phase correction signal is at a symbol level.

20. The method according to claim 19 wherein the step of despreading said selected channel also includes despreading a plurality of channels to produce despread channel signals.

21. The method according to claim 20 wherein said step of generating a phase correction signal further includes the steps of:

assigning a received symbol to one of four possible quadrature constellation points for said despread selected channel signal and each of said despread channel signals;

derotating each of said assigned symbols for said despread selected channel signal and each of said despread channel signals by determining the complex conjugate of each of said assigned points to produce respective error estimate signals;

coupling of each said error estimate signals and said despread pilot signal to inverse tangent processors to produce corresponding phase correction signals; and

combining said channel phase correction signal and said pilot phase correction signal to produce said phase correction signal.