Real time signal analyzer

• US 6,484,111 B1
• Filed: 07/30/1999
• Issued: 11/19/2002
• Est. Priority Date: 02/12/1997
• Status: Expired due to Fees

• Current Assignee: Sony/Tektronix Corporation (Fortive Corp.)
• Original Assignee: Sony/Tektronix Corporation (Fortive Corp.)
• Inventors: Nara, Akira
• Primary Examiner(s): Hoff, Marc S.
• Assistant Examiner(s): TSAI, CAROL S W
• Application Number:
  US09/355,468
• Time in Patent Office: 1,208 Days
• Field of Search: 702/57, 702/66, 702/67, 702/68, 702/69, 702/70, 702/71, 702/75-80, 702/106, 702/108, 702/110, 702/117, 702/118, 702/124-126, 702/177, 702/183, 702/189, 702/190, 702/197, 702/198, 702/FOR.103, 702/104, 702/FOR-107, 702/FOR-134, 702/FOR.155, 702/FOR.164, 702/FOR.168, 702/17, 702/FOR.171, 324/76.19, 324/76.21, 324/76.23, 324/76.35, 708/300, 708/311, 708/400, 708/403, 708/404, 708/405, 708/506
• US Class Current: 702/77
• CPC Class Codes: G01R 23/16 Spectrum analysis; Fourier analysis

Abstract

This invention relates to a real time signal analyzer that can produce time domain data and frequency domain data at the substantial same time and in real time, securing the simultaneousness between them, and can analyze them with changing the setting of the center frequency and the signal analysis span arbitrarily in low cost configuration. The apparatus has frequency conversion means 14 and 16 for shifting the frequency of input time domain data according to a selectable center frequency data and for decimating them according to a selectable decimation coefficient, a FFT processor 18 for FFT processing the output data of the frequency conversion means in real time, a delay means 28 for delaying the output data of the frequency conversion means for a predetermined time, a frequency domain data memory means 32 for storing the FFT processed frequency domain data from the FFT processor, a time domain data memory means 36 for storing the delayed time domain data read out from the delay means, and feedback means 30 and 38 for feeding the data read out from the time domain data memory means back to the frequency conversion means instead of the input time domain data.

Claims

1. A real time signal analyzer for receiving input time domain data, comprising:

a frequency conversion means for shifting the frequency of time domain data according to a selectable center frequency data, and for decimating the time domain data according to a selectable decimation coefficient;

an FFT processor for FFT processing the output data of the frequency conversion means in real time;

a delay means for delaying the output data of the frequency conversion means for a predetermined time;

a frequency domain data memory means for storing the FFT processed frequency domain data from the FFT processor;

a time domain data memory means for storing the delayed time domain data read out from the delay means; and

a selector means operable either for supplying the input time domain data to the frequency conversion means or for reading data out from the time domain memory means and feeding the data read out from the time domain data memory means back to the frequency conversion means.

2. A real time signal analyzer according to claim 1, wherein the delay means sets up the delay time corresponding to the processing time of the FFT processor.

6. A real time signal analyzer according to claim 1, wherein the frequency conversion means decimates the time domain data from the feedback means according to a decimation coefficient that is larger than the former one.

3. A real time signal analyzer comprising:

a frequency conversion means for shifting the frequency of input time domain data according to a first selectable center frequency and for decimating the input time domain data according to a first selectable decimation coefficient;

an FFT processor for FFT processing the output data of the frequency conversion means in real time;

a delay means for delaying the output data of the frequency conversion means for a predetermined time;

a frequency domain data memory means for storing the FFT processed frequency domain data from the FFT processor;

a time domain data memory means for storing the delayed time domain data read out from the delay means; and

a feedback means for feeding the data read out from the time domain data memory means back to the frequency conversion means instead of the input time domain data;

wherein the frequency conversion means shifts the frequency of the time domain data from the feedback means according to a second center frequency and decimates them according to a second decimation coefficient.

4. A real time signal analyzer according to claim 3, wherein the delay means sets up the delay time corresponding to the processing time of the FFT processor.

5. A real time signal analyzer according to claim 3, wherein the feedback means has a select means for selecting the input time domain data or the data read out from the time domain data memory means.

7. A real time signal analyzer according to claim 3, further comprising:

an analog to digital converter for converting an analog input signal to a digital signal;

an IQ separator for producing the input time domain data by separating the output digital signal of the analog to digital converter into the I and Q components.

8. A real time signal analyzer according to claim 3, wherein the frequency conversion means has a digital mixer for shifting the frequency of the input time domain data according to a selectable center frequency data, and a decimation filter for decimating the output data of the digital mixer according to a selectable decimation coefficient.

9. A real time signal analyzer according to claim 3, wherein the time domain data memory means stores the delayed time domain data in case of the second center frequency data and the second decimation coefficient independent of those in case of the first center frequency data and the first decimation coefficient.

10. A method of analyzing time domain data comprising:

shifting the frequency of time domain data according to a selectable center frequency data,

decimating the time domain data according to a selectable decimation coefficient,

executing a real time FFT process on the decimated time domain data and generating frequency domain data corresponding to the decimated time domain data,

storing the decimated time domain data in a time domain data memory,

storing the frequency domain data in a frequency domain data memory,

reading the stored time domain data and the stored frequency domain data, whereby the frequency domain data and the time domain data can be compared,

and wherein the time domain data that is read from the time domain data memory corresponds to the frequency domain data.