Testing system for evaluating integrated circuits, a testing system, and a method for testing an integrated circuit

• US 6,484,279 B2
• Filed: 01/23/2002
• Issued: 11/19/2002
• Est. Priority Date: 01/21/1998
• Status: Expired due to Fees

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Akram, Salman
• Primary Examiner(s): Decady, Albert
• Assistant Examiner(s): LAMARRE, GUY J
• Application Number:
  US10/057,635
• Publication Number:
  US 20020073370A1
• Time in Patent Office: 300 Days
• Field of Search: 714/724, 714/733, 714/734, 714/30, 714/742, 324/765, 324/760, 340/870.01, 257/666
• US Class Current: 714/724
• CPC Class Codes: G01R 31/2862 Chambers or ovens; Tanks
• CPC Class Codes: G01R 31/2868 Complete testing stations; systems; procedures; software aspects
• CPC Class Codes: G01R 31/2879 related to electrical aspects, e.g. to voltage or current supply or stimuli or to electrical loads
• CPC Class Codes: G01R 31/3025 Wireless interface with the DUT

Abstract

A burn-in testing system for evaluating a circuit under test, the system including a burn-in board having a plurality of receptacles, at least one of which being sized to receive the circuit under test, test interface circuitry supported by the board and coupled to the receptacles, the test interface circuitry including a transmitter and receiver; power conductors supported by the board, coupled to the receptacles and configured to be connected to a power supply to power the circuit under test during burn-in testing, control and data signal conductors, a burn-in oven having a compartment selectively receiving the burn-in board and being configured to apply heat within the compartment, and an interrogator unit supported by the burn-in oven, the interrogator unit being configured to send commands to the test interface circuitry to exercise the circuit under test optically or via radio communication and to receive responses to the commands optically or via radio communication. A method for testing an integrated circuit having operational circuitry formed thereon, optically and via radio frequency.

Claims

1. A testing system for evaluating a circuit under test, the system comprising:

a test board having a plurality of receptacles, at least one of which is configured to receive the circuit under test and to supply power thereto;

test interface circuitry coupled to the receptacles, the test interface circuitry including a transmitter and a receiver; and

an interrogator unit having a radio communication range extending to the test interface circuitry, the interrogator unit being configured to send commands via radio communication through the receiver to the test interface circuitry to exercise the circuit under test and to receive responses to the commands from the transmitter via radio communication.

2. A testing system in accordance with claim 1, wherein the test board comprises a burn-in board and the interface circuitry is mounted to the burn-in board.

3. A testing system in accordance with claim 1, wherein the interface circuitry is mounted to the test board.

4. A testing system in accordance with claim 1, further comprising power conductors supported by the test board, coupled to the receptacles and configured to be coupled to a power supply to power the circuit under test during testing, wherein the power conductors comprise conductive traces formed on the test board.

5. A testing system in accordance with claim 1, further comprising data lines supported by the test board, coupled between the receptacles and the test interface circuitry and configured to exchange information between the test interface circuitry and the circuit under test.

6. A testing system in accordance with claim 1, further comprising conductive traces formed on the test board and configured to couple the receptacles to the test interface circuitry.

7. A testing system in accordance with claim 1, wherein the circuit under test includes operational circuitry, and wherein the test interface circuitry cycles the operational circuitry according to the commands from the interrogator unit.

8. A testing system in accordance with claim 7, wherein the interrogator unit is configured to provide an identification code as part of the interrogating information, wherein the test interface circuitry includes ID labels assigned to respective receptacles, and wherein the test interface circuitry is configured to compare the identification code provided by the interrogator unit with the ID label of a receptacle of the plurality of receptacles corresponding to the circuit under test, the test interface circuitry being configured to test cycle the operational circuitry when the identification code matches the ID label.

9. A testing system in accordance with claim 1, wherein the test interface circuitry is separately coupled to respective ones of the plurality of receptacles such that the interrogator, in communication with the test interface circuitry, can select the circuit under test for test cycling.

10. A testing system in accordance with claim 1, wherein ones of the plurality of receptacles respectively comprise sockets configured to receive an integrated circuit comprising the circuit under test.

11. A testing system in accordance with claim 1, wherein at least one of the plurality of receptacles is configured to receive an integrated circuit defining the circuit under test.

12. A testing system for evaluating integrated circuits, the testing system comprising:

an interrogator unit having a transmitter having a radio communication range and configured to transmit interrogating information via radio communication;

a receiver configured for communications with the transmitter; and

a test board remote from the interrogator unit, but within the radio communication range, the test board including a plurality of receptacles configured to receive respective individual integrated circuits and to supply power thereto, the test board having test conductors coupling the receiver to respective ones of the plurality of receptacles, the plurality of receptacles including sockets configured to electrically couple the respective integrated circuits to the test conductors.

13. A testing system in accordance with claim 12, wherein the test board comprises a burn-in board and further comprising test interface circuitry supported by the burn-in board, the test interface circuitry including the receiver.

14. A testing system in accordance with claim 12, wherein the testing system is configured to perform dynamic testing.

15. A testing system in accordance with claim 12, wherein the testing system is configured to perform dynamic testing and wherein the integrated circuits are cycled on and off during a period of time greater than twelve hours and less than thirty-six hours.

16. A testing system in accordance with claim 12, further comprising a test chamber including a burn-in oven, wherein the testing system is configured to perform dynamic testing including cycling the integrated circuits on and off during a period of time greater than twelve hours and less than thirty-six hours while the oven heats the chamber to a temperature greater than 100 degrees Celsius.

17. A testing system in accordance with claim 12, further comprising a test chamber including a burn-in oven, wherein the testing system is configured to perform dynamic testing including cycling the integrated circuits on and off during a period of time of at least twelve hours while the oven heats the chamber to a temperature greater than 100 degrees Celsius.

18. A testing system in accordance with claim 12, wherein the test interface circuitry is formed on the test board.

19. A testing system in accordance with claim 12, wherein the testing system is configured to perform static testing.

20. A testing system in accordance with claim 12, further comprising power conductors configured to couple respective ones of the plurality of receptacles to a power source to supply power to the integrated circuits during testing wherein the power conductors extend at least partially along the test board.

21. A testing system in accordance with claim 12, further comprising:

power conductors formed on the test board and configured to couple respective ones of the plurality of receptacles to a power source to supply power to the integrated circuits during testing;

a burn-in oven configured to heat the test chamber during testing; and

a power source accessible from the test chamber, wherein the power conductors are configured to be removably coupled to the power source.

22. A testing system in accordance with claim 12, further comprising:

power conductors formed on the test board and configured to supply power to the integrated circuits during testing; and

a power source to which the power conductors are selectively coupled, the power source being configured to supply to the integrated circuits a voltage higher than a normal operating voltage of the respective integrated circuits.

23. A testing system in accordance with claim 12, wherein the test interface circuitry is configured to be separately coupled to the respective ones of the plurality of receptacles for individualized testing of integrated circuits.

24. A testing system for evaluating a circuit under test, the system comprising:

a test board including test interface circuitry coupled to a first optical coupler, the test board including a plurality of receptacles each configured to respectively receive the circuit under test;

test interface circuitry coupled to the receptacles, the test interface circuitry including a first optical coupler; and

an interrogator unit including a second optical coupler and being configured to optically send commands to the test interface circuitry, via the a second optical coupler, to test the circuit under test and to optically receive responses to the commands, via the second optical coupler.

25. A testing system in accordance with claim 24, wherein at least one of the plurality of receptacles is configured to receive an integrated circuit.

26. A testing system in accordance with claim 24, further comprising a fiber optic cable configured to couple the interrogator unit to the test interface circuitry.

27. A testing system for evaluating integrated circuits, the testing system comprising:

an interrogator unit having an optical transmitter having an optical communication range, the interrogator unit being configured to optically transmit interrogating information;

an optical receiver configured to communicate with the optical transmitter; and

a test board included within the optical communication range, the test board including a plurality of receptacles configured to receive respective individual integrated circuits and to supply power thereto, the test board supporting the optical receiver, the test board having test conductors configured to couple the optical receiver to respective receptacles, the receptacles including sockets configured to electrically couple the respective integrated circuits to the test conductors.

28. A testing system in accordance with claim 27, further comprising test interface circuitry supported by the test board, the test interface circuitry including the optical receiver.

29. A method for testing an integrated circuit including operational circuitry, the method comprising:

providing test interface circuitry and a plurality of receptacles configured to electrically interface the test interface circuitry with the operational circuitry in the integrated circuits and to supply power thereto;

providing an interrogator unit;

placing the integrated circuit in one of the plurality of receptacles;

heating the integrated circuit;

transmitting interrogating information from the interrogator unit to the test interface circuitry via radio communication;

testing the operational circuitry according to the interrogating information;

coupling test data from the operational circuitry to the interrogator unit; and

determining whether the integrated circuit has a defect.

30. A method in accordance with claim 29, further comprising:

marking respective ones of the plurality of receptacles with individual ID labels;

transmitting an identification code from the interrogator unit;

comparing the identification code with the ID label; and

test cycling the operational circuitry of an integrated circuit in a given receptacle only when the identification code matches the individual ID label of the given receptacle.

31. A method for testing an integrated circuit including operational circuitry, the method comprising:

providing test interface circuitry and a plurality of receptacles configured to receive integrated circuits and to electrically interface the operational circuitry in the integrated circuits with the test interface circuitry and to supply power thereto;

providing an interrogator unit;

placing the integrated circuit in one of the receptacles;

transmitting interrogating information from a transmitter having a communication range encompassing the one of the receptacles to the test interface circuitry, the transmitter being contained in the interrogator unit;

testing the operational circuitry according to the interrogating information;

transmitting test data output by the operational circuitry back to the interrogator unit; and

determining from the test data whether the integrated circuit has a defect.

32. A method in accordance with claim 31, further comprising:

marking respective ones of the plurality of receptacles with individual ID labels;

transmitting an identification code from the interrogator unit;

comparing the identification code with the individual ID labels; and

test cycling the operational circuitry of an integrated circuit in a given receptacle only when the identification code matches the individual ID label of the given receptacle.

33. A method in accordance with claim 31, further comprising heating the integrated circuit during testing.

34. A method for testing an integrated circuit including operational circuitry, the method comprising:

providing test interface circuitry and a plurality of receptacles configured to receive integrated circuits and to electrically interface the operational circuitry in the integrated circuits with the test interface circuitry and to supply power thereto;

providing an interrogator unit;

placing the integrated circuit in one of the receptacles;

transmitting interrogating information from the interrogator unit to the test interface circuitry via radio communication; and

testing the operational circuitry according to the interrogating information.

35. A method for testing an integrated circuit including operational circuitry, the method comprising:

providing test interface circuitry and a plurality of receptacles configured to receive integrated circuits, to electrically interface the operational circuitry in the integrated circuits with the test interface circuitry and to supply power thereto;

providing an interrogator unit;

placing the integrated circuit in one of the receptacles;

transmitting interrogating information from a transmitter to the test interface circuitry, the transmitter being included in the interrogator unit and having a communication range encompassing the one of the receptacles; and

testing the operational circuitry according to the interrogating information.

36. A testing system for evaluating a circuit under test, comprising:

a test board configured to receive and supply electrical power to the circuit under test;

test interface circuitry configured to be coupled to the circuit under test, the test interface circuitry including a transmitter and receiver; and

an interrogator unit having a radio communication range extending to the test interface circuitry, the interrogator unit being configured to exchange signals with the circuit under test via radio communication with the transmitter and receiver.

37. A testing system in accordance with claim 36, wherein the test interface circuitry is mounted on the test board.

38. A testing system in accordance with claim 36, further comprising a plurality of receptacles on the test board and configured to receive the circuit under test, and coupled to the test interface circuitry.

39. A testing system in accordance with claim 38, further comprising conductive traces on the test board coupling the receptacles to the test interface circuitry.

40. A testing system in accordance with claim 38, further comprising power conductors supported by the test board, configured to be coupled to the circuit under test and configured to be coupled to a power supply to power the circuit under test during testing, the power conductors comprising conductive traces formed on the test board.

41. A testing system for evaluating integrated circuits, comprising:

an interrogator unit having a transmitter having a radio communication range, the interrogator unit being configured to transmit interrogating information;

a receiver configured for radio communications with the transmitter; and

a test board within the radio communication range, the test board being configured to support respective individual integrated circuits, the test board supporting the receiver and having test conductors configured to couple the receiver to respective integrated circuits and to supply electrical power to the integrated circuits.

42. A testing system in accordance with claim 41, further comprising test interface circuitry supported by the test board, the test interface circuitry including the receiver.

43. A testing system in accordance with claim 41, the testing system being configured to perform dynamic testing.

44. A testing system in accordance with claim 41, the testing system being configured to perform dynamic testing wherein the integrated circuits are cycled on and off during a period of time greater than twelve hours and less than thirty-six hours.

45. A testing system in accordance with claim 41, wherein the testing system includes a burn-in oven and the testing system is configured to perform dynamic testing wherein the integrated circuits are cycled on and off during a period of time of at least twelve hours while the burn-in oven heats the chamber to a temperature greater than 100 degrees Celsius.

46. A testing system in accordance with claim 41, wherein the test interface circuitry is secured to the test board.

47. A testing system in accordance with claim 41, wherein the testing system is configured to perform static testing.

48. A testing system in accordance with claim 41, further comprising power conductors formed on the test board and configured to couple respective integrated circuits to a power source to supply power to the integrated circuits during testing, the power conductors extending at least partially along the test board.

49. A testing system in accordance with claim 48, further including a burn-in oven configured to heat the integrated circuits during testing and wherein the power conductors are configured to be removably coupled to the power source.

50. A testing system in accordance with claim 41, further comprising a power source to which power conductors are selectively coupled, the power source being configured to supply the integrated circuits a voltage higher than a normal operating voltage of the respective integrated circuits.

51. A testing system in accordance with claim 41, wherein the test interface circuitry is separately coupled to the respective receptacles and is configured for individualized testing of the integrated circuits.

52. A testing system for evaluating a circuit under test, the system comprising:

a test board having a plurality of receptacles, at least one of which is configured to receive the circuit under test and to supply power thereto;

test interface circuitry coupled to the receptacles, the test interface circuitry including a transmitter and a receiver; and

an interrogator unit having a contactless communication range extending to the test interface circuitry, the interrogator unit being configured to send commands via the receiver to the test interface circuitry to exercise the circuit under test and to receive responses to the commands from the transmitter.

53. A testing system in accordance with claim 52, wherein the test board comprises a burn-in board and the interface circuitry is mounted to the burn-in board.

54. A testing system in accordance with claim 52, wherein the interface circuitry is mounted to the test board.

55. A testing system in accordance with claim 52, further comprising power conductors supported by the test board, coupled to the receptacles and configured to be coupled to a power supply to power the circuit under test during testing, wherein the power conductors comprise conductive traces formed on the test board.

56. A testing system in accordance with claim 52, further comprising data lines supported by the test board, coupled between the receptacles and the test interface circuitry and configured to exchange information between the test interface circuitry and the circuit under test.

57. A testing system in accordance with claim 52, further comprising conductive traces formed on the test board and configured to couple the receptacles to the test interface circuitry.

58. A testing system in accordance with claim 52, wherein the circuit under test includes operational circuitry, and wherein the test interface circuitry cycles the operational circuitry according to the commands from the interrogator unit.

59. A testing system in accordance with claim 52, wherein the test board is configured to accommodate wafer level testing.

60. A testing system in accordance with claim 52, wherein the contactless communication range is a radio communication range.

61. A testing system in accordance with claim 52, wherein the contactless communication range is an optical communication range.