Shallow junction formation

• US 6,486,064 B1
• Filed: 09/26/2000
• Issued: 11/26/2002
• Est. Priority Date: 09/26/2000
• Status: Expired due to Term

• Current Assignee: Bell Semiconductor, LLC (Hilco Inc. (d/b/a Hilco Global))
• Original Assignee: LSI Logic Corporation (Broadcom, Inc.)
• Inventors: Puchner, Helmut
• Primary Examiner(s): Hiteshew, Felisa
• Assistant Examiner(s): UMEZ ERONINI, LYNETTE T
• Application Number:
  US09/670,448
• Time in Patent Office: 791 Days
• Field of Search: 438/689, 438/699, 438/766, 438/914, 438/957
• US Class Current: 438/689
• CPC Class Codes: H01L 21/2652 Through-implantation
• CPC Class Codes: H01L 21/28247 passivation or protection of the electrode, e.g. using re-oxidation
• CPC Class Codes: H01L 21/31155 by ion implantation
• CPC Class Codes: H01L 21/3144 on silicon
• CPC Class Codes: H01L 21/31662 of silicon in uncombined form
• CPC Class Codes: H01L 21/32105 Oxidation of silicon-containing layers
• CPC Class Codes: H01L 21/3211 Nitridation of silicon-containing layers
• CPC Class Codes: H01L 29/6659 with both lightly doped source and drain extensions and source and drain self-aligned to the sides of the gate, e.g. lightly doped drain [LDD] MOSFET, double diffused drain [DDD] MOSFET
• CPC Class Codes: Y10S 438/914 Doping
• CPC Class Codes: Y10S 438/957 Making metal-insulator-metal device

Abstract

A method of forming junctions in a semiconductor substrate, where a gate dielectric layer is grown on the semiconductor substrate, a gate electrode layer is deposited on the gate dielectric layer, and a sacrificial layer is formed on the gate electrode layer. The sacrificial layer is patterned with a material to cover portions of the sacrificial layer and expose portions of the sacrificial layer. The exposed portions of the sacrificial layer are etched to remove the exposed portions of the sacrificial layer and expose portions of the gate electrode layer. The exposed portions of the gate electrode layer are etched to expose portions of the gate dielectric layer and form a gate electrode having exposed vertical faces. The sacrificial layer and the exposed portions of the gate dielectric layer are impregnated with a first species that inhibits diffusion of oxygen through the sacrificial layer and the exposed portions of the gate dielectric layer. The impregnation is accomplished using a process that does not impregnate a significant amount of the first species in the exposed vertical faces of the gate electrode. The impregnated sacrificial layer, the exposed vertical faces of the gate electrode, and the impregnated exposed portions of the gate dielectric layer are exposed to an oxidizing environment, causing oxide growth on at least the exposed vertical faces of the gate electrode, and thereby covering the vertical faces of the gate electrode with oxide sidewalls. However, the oxidizing environment does not cause significant oxide growth under the impregnated sacrificial layer and the impregnated exposed portions of the gate dielectric layer. A second species is impregnated through the impregnated exposed portions of the gate dielectric layer into portions of the semiconductor substrate that underlie the impregnated exposed portions of the gate dielectric layer. The impregnated second species forms junctions in the portions of the semiconductor substrate that underlie the impregnated exposed portions of the gate dielectric layer.

Claims

1. A method of forming junctions in a semiconductor substrate, the method comprising:

growing a gate dielectric layer on the semiconductor substrate,

depositing a gate electrode layer on the gate dielectric layer,

forming a sacrificial layer on the gate electrode layer,

patterning the sacrificial layer with a material to cover portions of the sacrificial layer and expose portions of the sacrificial layer,

etching the exposed portions of the sacrificial layer to remove the exposed portions of the sacrificial layer and expose portions of the gate electrode layer,

etching the exposed portions of the gate electrode layer to expose portions of the gate dielectric layer and form a gate electrode having exposed vertical faces,

impregnating the sacrificial layer and the exposed portions of the gate dielectric layer with a first species that inhibits diffusion of oxygen through the sacrificial layer and the exposed portions of the gate dielectric layer, using a process that does not impregnate a significant amount of the first species in the exposed vertical faces of the gate electrode,

exposing the impregnated sacrificial layer, the exposed vertical faces of the gate electrode, and the impregnated exposed portions of the gate dielectric layer to an oxidizing environment, causing oxide growth on at least the exposed vertical faces of the gate electrode and thereby covering the vertical faces of the gate electrode with oxide sidewalls, but not causing significant oxide growth under the impregnated sacrificial layer and the impregnated exposed portions of the gate dielectric layer, and

impregnating a second species through the impregnated exposed portions of the gate dielectric layer into portions of the semiconductor substrate that underlie the impregnated exposed portions of the gate dielectric layer to form junctions in the portions of the semiconductor substrate that underlie the impregnated exposed portions of the gate dielectric layer.

2. The method of claim 1, wherein the semiconductor substrate is monocrystalline silicon, the gate dielectric layer is silicon oxide, the gate electrode layer is polysilicon, and the sacrificial layer is silicon oxide.

3. The method of claim 1, wherein the gate dielectric layer is deposited to a thickness of between about ten angstroms and about two hundred angstroms.

4. The method of claim 1, wherein the gate electrode layer is deposited to a thickness of between about five hundred angstroms and about three thousand angstroms.

5. The method of claim 1, wherein the sacrificial layer is deposited to a thickness of between about thirty angstroms and about three hundred angstroms.

6. The method of claim 1, wherein the first species is nitrogen.

7. The method of claim 1, wherein the first species is impregnated to a concentration of between about three atomic percent and about twenty atomic percent.

8. The method of claim 1, wherein the second species is one of boron and arsenic.

9. The method of claim 1, wherein the oxidizing environment is a dry oxidizing environment.

10. The method of claim 1, wherein the first species is impregnated by a highly directional plasma ion bombardment.

11. The method of claim 1, wherein the second species is impregnated by ion implantation.

12. The method of claim 1, further comprising the step of cleaning the surface of the impregnated exposed portions of the gate dielectric layer prior to the step of impregnating the second species.

13. A method of forming oxide sidewalls on exposed vertical sidewalls of a gate electrode without forming additional oxide on a top of the gate electrode or on active areas of a semiconductor substrate on which the gate electrode is disposed, the method comprising:

growing a gate dielectric layer on the semiconductor substrate,

depositing a gate electrode layer on the gate dielectric layer,

forming a sacrificial layer on the gate electrode layer,

patterning the sacrificial layer with a material to cover portions of the sacrificial layer and expose portions of the sacrificial layer,

etching the exposed portions of the sacrificial layer to remove the exposed portions of the sacrificial layer and expose portions of the gate electrode layer,

etching the exposed portions of the gate electrode layer to expose portions of the gate dielectric layer that overly the active areas of the semiconductor substrate, and also to form the gate electrode and the exposed vertical faces of the gate electrode,

impregnating the sacrificial layer and the exposed portions of the gate dielectric layer with a first species that inhibits diffusion of oxygen through the sacrificial layer and the exposed portions of the gate dielectric layer, using a process that does not impregnate a significant amount of the first species in the exposed vertical faces of the gate electrode,

exposing the impregnated sacrificial layer, the exposed vertical faces of the gate electrode, and the impregnated exposed portions of the gate dielectric layer to an oxidizing environment, causing oxide growth on at least the exposed vertical faces of the gate electrode and thereby covering the vertical faces of the gate electrode with oxide sidewalls, but not causing significant oxide growth under the impregnated sacrificial layer, and the impregnated exposed portions of the gate dielectric layer that overly the active areas of the semiconductor substrate, and

impregnating a second species through the impregnated exposed portions of the gate dielectric layer into the active areas of the semiconductor substrate that underlie the impregnated exposed portions of the gate dielectric layer to form junctions in the portions of the semiconductor substrate that underlie the impregnated exposed portions of the gate dielectric layer.

14. The method of claim 13, wherein the semiconductor substrate is monocrystalline silicon, the gate dielectric layer is silicon oxide, the gate electrode layer is polysilicon, and the sacrificial layer is silicon oxide.

15. The method of claim 13, wherein the first species is nitrogen.

16. The method of claim 13, further comprising the step of cleaning the surface of the impregnated exposed portions of the gate dielectric layer prior to the step of impregnating the second species.

17. A method of forming junctions in a semiconductor substrate, the method comprising:

growing a gate dielectric layer on the semiconductor substrate,

depositing a gate electrode layer on the gate dielectric layer,

forming a sacrificial layer on the gate electrode layer,

patterning the sacrificial layer with a material to cover portions of the sacrificial layer and expose portions of the sacrificial layer,

etching the exposed portions of the sacrificial layer to remove the exposed portions of the sacrificial layer and expose portions of the gate electrode layer,

etching the exposed portions of the gate electrode layer to expose portions of the gate dielectric layer and form a gate electrode having exposed vertical faces,

impregnating the sacrificial layer and the exposed portions of the gate dielectric layer with a first species that inhibits diffusion of oxygen through the sacrificial layer and the exposed portions of the gate dielectric layer, using a process that does not impregnate a significant amount of the first species in the exposed vertical faces of the gate electrode,

impregnating a second species through the impregnated exposed portions of the gate dielectric layer into portions of the semiconductor substrate that underlie the impregnated exposed portions of the gate dielectric layer to form junctions in the portions of the semiconductor substrate that underlie the impregnated exposed portions of the gate dielectric layer, and

exposing the impregnated sacrificial layer, the exposed vertical faces of the gate electrode, and the impregnated exposed portions of the gate dielectric layer to an oxidizing environment, causing oxide growth on at least the exposed vertical faces of the gate electrode and thereby covering the vertical faces of the gate electrode with sidewall oxide spacers, but not causing significant oxide growth under the impregnated sacrificial layer and the impregnated exposed portions of the gate dielectric layer.