Blind coherent combiner and method using coupled phase-lock loops

• US 6,486,742 B1
• Filed: 09/10/2001
• Issued: 11/26/2002
• Est. Priority Date: 09/10/2001
• Status: Active Grant

• Current Assignee: Lockheed Martin Corporation (Martin Marietta Corporation)
• Original Assignee: Lockheed Martin Corporation (Martin Marietta Corporation)
• Inventors: Fain, Eric, Steele, Greg
• Primary Examiner(s): Cunningham, Terry D.
• Assistant Examiner(s): TRA, ANH QUAN
• Application Number:
  US09/950,129
• Time in Patent Office: 442 Days
• Field of Search: 331/1.A, 375/11, 375/12, 375/22, 375/46, 375/327, 375/376
• US Class Current: 331/11
• CPC Class Codes: H03L 7/07 using several loops, e.g. for redundant clock signal generation
• CPC Class Codes: H03L 7/087 using at least two phase detectors or a frequency and phase detector in the loop

Abstract

Coherent combining apparatus and methods that do not require training to adapt combining weights. The approach employed in the present invention uses phase-lock loops to demodulate input signals. The phase-lock loops are coupled so that their outputs are phase coherent. The outputs of the phase-lock loops are summed to obtain a coherent combining of the input signals. Exemplary embodiments of the present invention comprise two or more phase-lock loops having signal inputs and I and Q data outputs. A combiner sums the I and Q data output by the two or more phase-lock loops. A common decision circuit feeds back the summed output of the combiner to the two or more phase-lock loops and generates phase coherent output signals.

Claims

1. Apparatus comprising:

first and second phase-lock loops having signal inputs and I and Q data outputs;

a combiner for summing the I and Q data output by the first and second phaselock loops; and

a common decision circuit,that feeds back the summed output of the combiner to each phase-lock loop and that outputs phase coherent output signals from the apparatus.

2. The apparatus recited in claim 1 wherein the combiner comprises I and Q summing circuits.

4. The apparatus recited in claim 1 wherein the combiner comprises I and Q summing circuits.

3. Apparatus comprising:

two or more phase-lock loops having signal inputs and I and Q data outputs;

a combiner for summing the I and Q data output by the two or more phase-lock loops; and

a common decision circuit 13 that feeds back the summed output of the combiner to the two or more phase-lock loops and that outputs phase coherent output signals from the apparatus.

5. A method for coupling two or more phase-lock loops that each output I and Q data to produce a phase coherent output signal, comprising the steps of:

summing the I and Q data output by the two or more phase-lock loops;

processing the summed I and Q data using a common decision circuit to generate a phase coherent output signal; and

feeding back the summed I and Q data to the two or more phase-lock loops.