Multiprocessor system that communicates through an internal bus using a network protocol

• US 6,487,619 B1
• Filed: 10/14/1999
• Issued: 11/26/2002
• Est. Priority Date: 10/14/1999
• Status: Expired due to Fees

• Current Assignee: NEC Corporation
• Original Assignee: NEC Corporation
• Inventors: Takagi, Hitoshi
• Primary Examiner(s): Ray, Gopal C.
• Application Number:
  US09/417,643
• Time in Patent Office: 1,139 Days
• Field of Search: 710/105, 710/8, 710/305, 710/313, 710/316, 709/221, 709/305, 709/301, 709/253, 709/238, 709/250, 709/220, 714/4, 370/386, 340/825
• US Class Current: 710/105
• CPC Class Codes: G06F 13/385 for adaptation of a particular data processing system to different peripheral devices
• CPC Class Codes: G06F 15/17 using an input/output type connection, e.g. channel, I/O port

Abstract

A multi-processor computer system includes a plurality of computing cells, each of which include a processor, a memory and an interface unit. An interconnect device connects the computing cells. Each of the computing cells are provided with a network driver for the interconnect device so that the computing cells can communicate with each other by using a network protocol.

Claims

1. A multi-processor computer system comprising:

a plurality of computing cells, each of the computing cells comprising a processor, a memory, and an interface unit; and

an industry standard shared Input-Output (I/O) bus that interconnects the plurality of computing cells using the interface units,

wherein each of the computing cells are provided with a network driver which recognizes and communicates with the industry standard shared Input-Output (I/O) bus as a network device, and communicate with each other through the industry standard shared Input-Output (I/O) bus by using a network protocol.

2. The system according to claim 1, wherein the industry standard shared I/O bus is a PCI bus.

3. The system according to claim 1, wherein the industry standard shared I/O bus is a time division shared bus.

4. The system according to claim 1, wherein the network protocol is the TCP/IP protocol.

5. A method of communicating between processors of a multiprocessor system, comprising the steps of:

providing a plurality of computing cells, each containing a processor of the multiprocessor system, a memory, and an interface unit;

connecting the computing cells by using an industry standard shared Input-Output (I/O) bus;

providing each of the computing cells with a network driver which recognizes and communicates with the industry standard shared Input-Output (I/O) bus as a network device; and

wherein each of the computing cells communicate with each other through the industry standard shared Input-Output (I/O) bus by using a network protocol.

6. The method according to claim 5, wherein the industry standard shared I/O bus is a PCI bus.

7. The method according to claim 5, wherein the industry standard shared I/O bus is a time division shared bus.

8. The method according to claim 5, wherein the network protocol is the TCP/IP protocol.

9. A method of communicating between processors of a multiprocessor system, comprising the steps of:

providing a plurality of computing cells, each containing at least a processor of the multiprocessor system, a memory, and an interface unit;

connecting the computing cells using an industry standard shared Input-Output (I/O) bus;

configuring and defining the industry standard shared Input-Output (I/O) bus as network hardware; and

using a network protocol to transmit data between the processors of the computing cells through the industry shared Input-Output (I/O) bus.

10. The method according to claim 9, further comprising the step of providing a PCI bus as the industry standard shared I/O bus.

11. The method according to claim 9, further comprising the step of providing a time division shared bus as the industry standard shared I/O bus.

12. The method according to claim 9, further comprising the step of using the TCP/IP protocol as the network protocol.