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Base current reversal SRAM memory cell and method

  • US 6,489,192 B2
  • Filed: 01/08/2001
  • Issued: 12/03/2002
  • Est. Priority Date: 03/16/1999
  • Status: Expired due to Fees
First Claim
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1. A method of forming a memory cell comprising:

  • forming a series of epitaxial layers on a substrate;

    etching trenches through the series of epitaxial layers to form a series of bars;

    forming an oxide under the bars to electrically isolate the bars from the substrate;

    forming a NPN bipolar transistor on top of the oxide; and

    forming a PMOS FET having a source, the PMOS FET formed on top of the NPN bipolar transistor and within one of the trenches, the NPN bipolar transistor formed in the source of the PMOS FET.

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