Semiconductor memory device and method for fabricating the same
First Claim
Patent Images
1. A semiconductor memory device, comprising:
- an insulating layer formed on a substrate;
a paraelectric layer formed on the insulating layer;
a conductive layer formed on the paraelectric layer;
a ferroelectric layer formed on the conductive layer; and
a second conductive layer formed on the ferroelectric conductive layer;
wherein the conductive layer is formed in lattice matching with the paraelectric layer and the conductive layer is formed in lattice matching with the ferroelectric layer.
0 Assignments
0 Petitions
Accused Products
Abstract
A semiconductor memory device and method of fabricating the same, which improves adhesion of the lower electrode of a ferroelectric planar capacitor, and prevents inter-diffusion between the Pt electrode of the capacitor and adhesion layer placed under the Pt electrode. The semiconductor memory device includes an insulating layer formed on a substrate, a paraelectric layer formed on the insulating layer, and a conductive layer formed on the paraelectric layer.
15 Citations
11 Claims
-
1. A semiconductor memory device, comprising:
-
an insulating layer formed on a substrate;
a paraelectric layer formed on the insulating layer;
a conductive layer formed on the paraelectric layer;
a ferroelectric layer formed on the conductive layer; and
a second conductive layer formed on the ferroelectric conductive layer;
wherein the conductive layer is formed in lattice matching with the paraelectric layer and the conductive layer is formed in lattice matching with the ferroelectric layer. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
-
Specification