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Trench DMOS device having a high breakdown resistance

  • US 6,489,652 B1
  • Filed: 11/01/1996
  • Issued: 12/03/2002
  • Est. Priority Date: 11/11/1995
  • Status: Expired due to Fees
First Claim
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1. A trench semiconductor device, comprising:

  • a trench formed in a semiconductor substrate, said trench having sidewalls, a bottom, and bottom corners where the sidewalls and bottom merge;

    a gate polysilicon layer substantially filled into said trench; and

    a gate oxide layer formed between said gate polysilicon layer and said sidewalls, said bottom and said bottom corners of said trench, said gate oxide layer having a first portion on said sidewalls and a second portion on said bottom, said second portion being thicker than said first portion and comprising a central region bounded by boundary regions, wherein said central region is raised step-wise at angles of approximately ninety degrees from said boundary regions and has a substantially flattened top surface, and wherein the transitions between steps of said central and said boundary regions are substantially planar.

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