Crossbar switch and method with crosspoint circuit

• US 6,490,213 B1
• Filed: 10/14/1999
• Issued: 12/03/2002
• Est. Priority Date: 02/22/1996
• Status: Expired due to Fees

• Current Assignee: Fujitsu Limited
• Original Assignee: Fujitsu Limited
• Inventors: Mu, Albert, Larson, Jeffrey D.
• Primary Examiner(s): Nelms, David
• Assistant Examiner(s): AUDUONG, GENE NGHIA
• Application Number:
  US09/419,702
• Time in Patent Office: 1,146 Days
• Field of Search: 365/203, 365/204, 365/205, 365/207, 365/208, 365/230.06, 365/230.08
• US Class Current: 365/208
• CPC Class Codes: H04L 49/101 using crossbar or matrix
• CPC Class Codes: H04L 49/205 Quality of Service based
• CPC Class Codes: H04L 49/25 Routing or path finding in a switch fabric
• CPC Class Codes: H04L 49/254 Centralised controller, i.e. arbitration or scheduling
• CPC Class Codes: H04L 49/3018 Input queuing
• CPC Class Codes: H04Q 3/523 Details

Abstract

A switch system and method transfer a data packet from a source data port to one or more destination data ports through a switch. The system includes at least one crosspoint circuit. A crosspoint circuit in the switch system includes a first and a second reduced voltage swing line, a first and a second transistor circuit for each data input path and a sense amplifier for a data port. The first reduced voltage swing line is coupled to the first transistor circuit, the second reduced voltage swing line is coupled to the second transistor circuit and both reduced voltage swing lines are connected to the sense amplifier. A method for transferring data using a crosspoint circuit includes a charging first voltage line and a second voltage line to a predetermined voltage level, discharging the predetermined voltage level in the first voltage line, maintaining the predetermined voltage level in the second voltage line concurrently with the discharging step, receiving a high clock signal at a sense amplifier, and generating an output signal based on a differential voltage level at the arrival of the clock signal.

Claims

1. A reduced voltage swing crosspoint circuit to transfer data packets from a source port to a destination port of a crossbar switching system, the crosspoint circuit comprising:

a first voltage line and a second voltage line;

a first transistor circuit coupled to the first voltage line for discharging the first voltage line responsive to the first transistor circuit receiving an enable signal from an arbitrage logic unit of the crossbar switching system and a data signal coupled from an input data path of the crossbar switching system;

a second transistor circuit coupled to the second voltage line for discharging the second voltage line responsive to the second transistor circuit receiving the enable signal and an inverted data signal;

a precharge circuit coupled to the first and second voltage lines for charging the first and second voltage lines to a predetermined voltage level, the precharge circuit switching to an off-state prior to discharging of the first or the second voltage line; and

a sense amplifier, having an input for receiving a clock signal configured to generate a full-swing output signal coupled to an output data path of the crossbar switch when the clock signal is high and there is a differential voltage level greater than a preselected differential voltage level between the first voltage line and second voltage line.

2. The crosspoint circuit as in claim 1, wherein the first transistor circuit comprises a first transistor and a second transistor coupled in series.

3. The crosspoint circuit as in claim 1, wherein the second transistor circuit comprises a third transistor and a fourth transistor coupled in series.

4. The crosspoint circuit as in claim 1, wherein the first transistor circuit comprises a differential pair of transistors.

5. The crosspoint circuit as in claim 4, wherein an inverter is coupled to the data signal to generate the inverted data signal.

6. The crosspoint circuit as in claim 1, wherein the second transistor circuit comprises a differential pair of transistors.

7. The crosspoint circuit as in claim 1, further comprising a buffer circuit for coupling the data signal from the data input port to the crosspoint circuit.

8. In a switching system for selectively transferring data packets, a reduced-swing crosspoint circuit having a first voltage line, a second voltage line, and a sense amplifier, a method for transferring data using the crosspoint circuit comprising:

charging the first voltage line and the second voltage line to a predetermined voltage level;

discharging the predetermined voltage level in the first voltage line;

maintaining the predetermined voltage level in the second voltage line concurrently with the discharging step;

receiving a high clock signal at the sense amplifier; and

generating an output signal based on a differential voltage level at the arrival of the clock signal between the discharged predetermined voltage level in the first voltage line and the maintained predetermined voltage level in the second voltage line.

9. The method as in claim 8, wherein the discharging step further comprises the step of placing a transistor circuit in an on state.

10. The method as in claim 8, wherein the output signal is a full-swing output signal.

11. The method as in claim 8, wherein the output signal is a full-swing output signal having a value greater than the preselected value of the differential voltage level.

12. In a switching system for selectively transferring data packets, a reduced-swing crosspoint circuit having a first voltage line, a second voltage line, and a sense amplifier, a method for transferring data between an input data path to an output data path using the crosspoint circuit comprising:

charging the first voltage line and the second voltage line to a predetermined voltage level;

discharging the predetermined voltage level in the first voltage line responsive to an enable signal of an arbitrage logic unit and a data signal;

discharging the predetermined voltage level in the second voltage line concurrently with the discharging step;

receiving a high clock signal at the sense amplifier; and

generating an output signal responsive to a differential voltage level between the first and the second voltage lines exceeding a preselected value and a clock signal having a preselected value.

13. The method as in claim 12, wherein the preselected value of the differential voltage level is less than the predetermined voltage level.

14. A crosspoint circuit, comprising:

a data line for receiving a data signal from a data input path of a crossbar switching system, the data signal having two logical values;

an enable line for receiving an enable signal having at least two logical values from an arbitrage logic unit of the crossbar switching system;

a first voltage line;

a second voltage line;

a first circuit adapted to charge the first voltage line and the second voltage line to a predetermined voltage level responsive to the enable signal having a logical value corresponding to a disabled state;

a second circuit configured to discharge the first voltage line responsive to the enable signal having a logic value corresponding to an enabled state and the data signal having a first logic value;

a second discharge circuit configured to discharge the second voltage line responsive to the enable signal having the logical value corresponding to the enabled state and the data signal having a second logical value; and

a sense amplifier generating an output coupled to a data output path that is a full-swing output signal responsive to a difference in voltage between the first voltage line and the second voltage line for the enabled state exceeding a pre-selected differential voltage level.