High Q gyrator structures
First Claim
1. A method for making a filter circuit comprising at least one filter stage, the method comprising:
- a) providing the at least one filter stage with a gyrator core section having four inverters mutually connected in a loop configuration between a pair of input terminals and a pair of output terminals;
b) providing at least one common mode feedback section, the at least one common mode feedback section being connected between at least one said pair of input terminals and said pair of output terminals and comprising two series connections respectively formed by an inverter and a short-sectioned inverter connected antiparallely between at least one of said input terminals and said output terminals, each of said inverters including at least one of a MOS, CMOS, and BiCMOS transistor, the at least one of a MOS, CMOS, and BiCMOS transistor having a gate, drain, source, and a channel region between said drain and source, and c) wherein the channel region dimensions of the transistors of at least one of the gyrator core section and the common mode feedback section are selected such that the following relationship is fulfilled;
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Accused Products
Abstract
The invention relates to a filter circuit and a method for making a filter circuit comprising at least one gyrator core section (GCi) having four inverters mutually connected in a loop configuration between a pair of input terminals (i—1; i—2) and a pair of output terminals (o—1; o—2). At least one common mode feedback section (CMIi, CMOi) is provided between the pair of input terminals and/or the pair of output terminals. The common mode feedback section comprises two series connections respectively formed by an inverter and a short-sectioned inverter connected antiparallelly between the input terminals or the output terminals. The inverters may be constituted by a MOS, CMOS or BiCMOS or bipolar transistor. According to the invention, the channel region dimensions of the transistors of the gyrator core section and/or the common mode feedback section are selected such that the relationship g*C≧gm*cm is fulfilled, where g is the effective conductive loading of the gyrator core section terminals, C is the effective capacitive loading of the gyrator core section terminals, gm is the effective gyration constant of the gyrator core section, and cm is the effective transcapacitance of the gyrator core section.
21 Citations
30 Claims
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1. A method for making a filter circuit comprising at least one filter stage, the method comprising:
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a) providing the at least one filter stage with a gyrator core section having four inverters mutually connected in a loop configuration between a pair of input terminals and a pair of output terminals;
b) providing at least one common mode feedback section, the at least one common mode feedback section being connected between at least one said pair of input terminals and said pair of output terminals and comprising two series connections respectively formed by an inverter and a short-sectioned inverter connected antiparallely between at least one of said input terminals and said output terminals, each of said inverters including at least one of a MOS, CMOS, and BiCMOS transistor, the at least one of a MOS, CMOS, and BiCMOS transistor having a gate, drain, source, and a channel region between said drain and source, and c) wherein the channel region dimensions of the transistors of at least one of the gyrator core section and the common mode feedback section are selected such that the following relationship is fulfilled;
- View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
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13. A filter circuit comprising at least one filter stage, the at least one filter stage comprising:
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a) a gyrator core section having four inverters mutually connected in a loop configuration between a pair of input terminals and a pair of output terminals;
b) at least one common mode feedback section connected between at least one of the the pair of input terminals and the pair of output terminals and comprising two series connections respectively formed by an inverter and a shortsectioned inverter connected antiparallely between at least one said input terminals and said output terminals;
c) each of said inverters comprising at least one MOS, CMOS or BiCMOS transistor, each of the at least one of a MOS, CMOS or BiCMOS transistors having a gate, drain, source, and a channel region between said drain and source;
d) wherein the channel region dimensions of the transistors of at least one of the gyrator core section and the common mode feedback section are selected such that the following relationship is fulfilled;
- View Dependent Claims (14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24)
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25. The method for making a filter circuit comprising at least one filter stage, the method comprising:
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a) providing said at least one filter stage with a gyrator core section having four inverters mutually connected in a feedback loop between a pair of input terminals and a pair of output terminals;
b) wherein the inverters are arranged as a differential transconductor configuration, such that a first and second inverter are respectively provided between the first input and first output terminal and the second input terminal and the second output terminal;
c) each of said inverters comprises at least one of a MOS, CMOS, and BiCMOS transistor, the at least one of a MOS, CMOS, and BiCMOS transistor having a gate, drain, source, and a channel region between said drain and source; and
d) selecting the general region dimensions of the transistors of the gyrator core section such that the following relationship is fulfilled;
- View Dependent Claims (26, 27)
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28. The filter circuit comprising:
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a) at least one filter stage with a gyrator core section having four inverters mutually connected in a feedback loop between a pair of input terminals and a pair of output terminals;
b) wherein the inverters are arranged as a differential transconductor configuration, such that a first and second inverter are respectively provided between the first input and first output terminal and the second input terminal and the second output terminal;
c) wherein each of said inverters comprises at least one of a MOS, CMOS, and BiCMOS transistor, the at least one of a MOS, CMOS, and BiCMOS transistor having a gate, drain, source, and a channel region between said drain and source;
d) wherein the general region dimensions of the transistors of the gyrator core section are selected such that the following relationship is fulfilled;
- View Dependent Claims (29)
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30. The filter circuit according 28, wherein:
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the channel region length and the channel region width of the gyrator core section transistors is reduced; and
the transadmittance of the respective transistor is kept constant.
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Specification