Apparatus and method for in-system programming of a field programmable logic device using device-specific characterization data

• US 6,490,714 B1
• Filed: 11/21/1997
• Issued: 12/03/2002
• Est. Priority Date: 11/27/1996
• Status: Expired due to Term

• Current Assignee: Altera Corporation (Intel Corporation)
• Original Assignee: Altera Corporation (Intel Corporation)
• Inventors: Linsenbach, Daren, Kurniawan, Rusli, Yeh, Paul
• Primary Examiner(s): Smith, Matthew
• Assistant Examiner(s): DO, THUAN V
• Application Number:
  US08/975,835
• Time in Patent Office: 1,838 Days
• Field of Search: 375/354, 716/2, 716/4, 716/6, 716/16, 716/17, 365/185.2
• US Class Current: 365/185.2
• CPC Class Codes: G06F 30/34 for reconfigurable circuits, e.g. field programmable gate arrays [FPGA] or programmable logic devices [PLD]
• CPC Class Codes: H03K 19/17748 Structural details of configuration resources
• CPC Class Codes: H03K 19/17764 for reliability
• CPC Class Codes: H03K 19/1778 Structural details for adapting physical parameters

Abstract

A programmable logic device includes field programmable logic circuits and an internal programming circuit. The internal programming circuit includes a memory to store characterization data characterizing programmed voltage values of the field programmable logic circuits as a function of program voltage pulse widths. A characterization data processor programs the field programmable logic circuits using the characterization data.

Claims

1. A programmable logic device, comprising:

field programmable logic circuits; and

an internal programming circuit including

a memory to store characterization data characterizing programmed voltage values of said field programmable logic circuits as a function of a plurality of program voltage pulse widths, wherein said characterization data is generated based on a measured voltage margin value and a pre-determined slope value that represents a relationship between program voltage pulse widths and program voltage values typical in devices similar to the programmable logic device, and wherein said measured voltage margin value is representative of a measured amount of stored charge of a floating gate of a designated one of the field programmable logic circuits after the designated field programmable logic circuit is programmed at least in part according to one of the plurality of program voltage pulse widths, and

a characterization data processor to program said field programmable logic circuits using said characterization data.

2. The apparatus of claim 1 wherein said characterization data includes index values corresponding to said voltage pulse widths.

3. The apparatus of claim 1 wherein said characterization data processor processes a programming pattern containing information for programming said field programmable logic circuits.

4. The apparatus of claim 3 wherein said characterization data processor processes said programming pattern by selecting programming voltage values and programming voltage pulse widths based upon said characterization data.

5. A data processing system, comprising:

a field programmable logic device, including

field programmable logic circuits; and

an internal programming circuit including

a memory to store characterization data characterizing programmed voltage values of said field programmable logic circuits as a function of a plurality of program voltage pulse widths, wherein said characterization data is generated based on a measured voltage margin value and a pre-determined slope value that represents a relationship between program voltage pulse widths and program voltage values typical in devices similar to the programmable logic device, wherein said measured voltage margin value is representative of a measured amount of stored charge of a floating gate of a designated one of the field programmable logic circuits after the designated field programmable logic circuit is programmed at least in part according to one of the plurality of program voltage pulse widths, and

a characterization data processor to program said field programmable logic circuits using said characterization data.

6. The apparatus of claim 5 further comprising:

a system bus connected to said field programmable logic device; and

a plurality of data processing elements connected to said system bus.

7. The apparatus of claim 6 wherein said plurality of data processing elements include a processor and input/output circuitry.

8. The apparatus of claim 6 wherein said plurality of data processing elements include peripheral devices and a memory.

9. A method of programming a programmable logic device, said method comprising the steps of:

receiving a programming pattern specifying a functional operation to be performed by a programmable logic device;

applying a voltage pulse with a known pulse width to a designated circuit of said programmable logic device;

measuring a voltage margin value for said designated circuit, said voltage margin value representative of a measured amount of stored charge of a floating gate of the designated circuit;

combining said voltage margin value with a known slope value to construct characterization data characterizing programmed voltage values of said programmable logic device as a function of program voltage pulse widths, wherein said known slope value represents a relationship between program voltage pulse widths and program voltage values typical in devices similar to the programmable logic device;

storing said characterization data within said programmable logic device; and

programming said programmable logic device with said programming pattern by selecting programming voltage values and programming voltage pulse widths based upon said characterization data.

10. The method of claim 9 further comprising the step of erasing said programmable logic device before said applying step.

11. The method of claim 9 further comprising the step of erasing said programmable logic device before said programming step.

12. A programmable logic device configured to be coupled on a circuit board, comprising:

field programmable logic circuits; and

an internal programming circuit configured to program a programming pattern into the field programmable logic circuits, the internal programming circuit comprising

a memory configured to store device-specific characterization data, wherein the device-specific characterization data is representative of a plurality of voltage pulse widths and a plurality of voltage margin values, wherein at least one of said voltage margin values is representative of an amount of stored charge on a floating gate of a designated one of the field programmable logic circuits; and

a characterization data processor configured to use the device-specific characterization data to program the programming pattern into the field programmable logic circuits.

13. The programmable logic device of claim 12 wherein the internal programming circuit comprises a characterization routine configured to program a designated one of the field programmable circuits with a specified voltage pulse width, to measure a voltage margin value of the designated circuit after programming the designated circuit and to generate the characterization data according to the measured voltage margin value and the specified voltage pulse width.

14. The programmable logic device of claim 13 wherein the characterization routine generates the characterization data according to the measured voltage margin value, the specified voltage pulse width and a pre-determined slope value representative of a relationship between voltage pulse widths and voltage margin values typical in devices similar to the programmable logic device.

15. The programmable logic device of claim 12 wherein the internal programming circuit is configured to use a selected one of the voltage pulse widths and a corresponding one of the voltage margin values to program the programming pattern into the field programmable logic circuits.

16. A method of programming a specified programming pattern into a programmable logic device that is configured to couple on a circuit board, the method comprising:

obtaining device-specific characterization data representative of a plurality of program voltage pulse widths and a plurality of corresponding program voltage values, wherein the plurality of corresponding program voltage values are specific to the programmable logic device, the obtaining further comprising applying a program voltage pulse with a known pulse width to a designated field programmable logic circuit of the programmable logic device and measuring a voltage margin value for the designated field programmable logic circuit, wherein the voltage margin value is representative of an amount of stored charge on a floating gate of the designated circuit;

selecting one of the plurality of program voltage pulse widths and a corresponding one of the program voltage values; and

programming the specified programming pattern into the programmable logic device with the selected program voltage pulse width and the corresponding program voltage value.

17. The method of claim 16 wherein the obtaining step includes combining the voltage margin value with a pre-determined slope value to construct the characterization data, wherein the pre-determined slope value is representative of a relationship between program voltage pulse widths and program voltage values typical in devices similar to the programmable logic device.