Method of making a Schottky diode in an integrated circuit

• US 6,492,192 B1
• Filed: 09/11/1998
• Issued: 12/10/2002
• Est. Priority Date: 05/13/1996
• Status: Expired due to Term

• Current Assignee: Round Rock Research LLC
• Original Assignee: Micron Technology, Inc.
• Inventors: Ovard, David K., Tuttle, John R., Rotzoll, Robert R., Tuttle, Mark E., Lowrey, Tyler, Higgins, Brian P., Yu, Shu-Sun, Devereaux, Kevin M., Pax, George E., OʼToole, James E.
• Primary Examiner(s): Sherry, Michael
• Assistant Examiner(s): PERT, EVAN T
• Application Number:
  US09/151,936
• Time in Patent Office: 1,551 Days
• Field of Search: 438/328, 438/257, 438/FOR.415, 438/FOR.335, 438/73, 438/80, 438/81, 438/57, 438/381, 257/44
• US Class Current: 438/57
• CPC Class Codes: G06K 19/0707 the arrangement being capable of collecting energy from external energy sources, e.g. thermocouples, vibration, electromagnetic radiation G06K19/0702 takes precedence
• CPC Class Codes: G06K 19/0712 the arrangement being capable of triggering distinct operating modes or functions dependent on the strength of an energy or interrogation field in the proximity of the record carrier active means for hindering electromagnetic reading or writing G06K19/07336
• CPC Class Codes: G06K 19/0716 at least one of the integrated circuit chips comprising a sensor or an interface to a sensor
• CPC Class Codes: G06K 19/0723 the record carrier comprising an arrangement for non-contact communication, e.g. wireless communication circuits on transponder cards, non-contact smart cards or RFIDs
• CPC Class Codes: G06K 19/0726 the arrangement including a circuit for tuning the resonance frequency of an antenna on the record carrier
• CPC Class Codes: G06K 19/07749 the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
• CPC Class Codes: G06K 19/07758 arrangements for adhering the record carrier to further objects or living beings, functioning as an identification tag
• CPC Class Codes: G06K 7/0008 General problems related to the reading of electronic memory record carriers, independent of its reading method, e.g. power transfer
• CPC Class Codes: G06K 7/10059 transponder driven
• CPC Class Codes: H01Q 1/2225 used in active tags, i.e. provided with its own power source or in passive tags, i.e. deriving power from RF signal
• CPC Class Codes: H03L 7/0995 the oscillator comprising a ring oscillator
• CPC Class Codes: H03L 7/148 said digital means comprising a counter or a divider

Abstract

A method of forming an integrated circuit including a Schottky diode includes providing a substrate of a first conductivity type, defining a region of a second conductivity type relative to the substrate and forming an insulator over the second conductivity type region. The method also includes removing an area of the insulator for definition of a contact hole, and removing an area encircling the contact hole and forming highly doped regions of the second conductivity type in second conductivity type regions encircling the contact hole. The method further includes depositing a Schottky metal in the contact hole and annealing the metal to form a suicide interface to the second conductivity type region.

Claims

1. A method of forming an integrated circuit including a Schottky diode, the method comprising:

providing a p-type substrate;

defining an n-type region relative to the substrate;

forming an insulator over the n-type region;

removing an area of the insulator for definition of a contact hole, and removing an area encircling the contact hole;

forming n+ regions in the n-type regions encircling the contact hole;

depositing a Schottky metal in the contact hole; and

annealing the metal to form a silicide interface to the n-type region.

2. A method in accordance with claim 1 and further comprising depositing tungsten into the contact hole.

3. A method in accordance with claim 2 wherein the tungsten is deposited by chemical vapor deposition.

4. A method in accordance with claim 2 and further comprising planarizing the tungsten.

5. A method of forming an integrated circuit including a Schottky diode, the method comprising:

providing a substrate;

defining a p-type region relative to the substrate;

forming an insulator over the p-type region;

removing an area of the insulator for definition of a contact hole, and removing an area encircling the contact hole;

forming p+ regions in the p-type regions encircling the contact hole;

depositing a Schottky metal in the contact hole; and

annealing the Schottky metal to form a silicide interface to the p-type region.

6. A method in accordance with claim 5 and further comprising depositing tungsten into the contact hole.

7. A method in accordance with claim 6 wherein the tungsten is deposited by chemical vapor deposition.

8. A method in accordance with claim 6 and further comprising planarizing the tungsten.

9. A method of forming an integrated circuit including a Schottky diode, the method comprising:

providing a p-type substrate;

defining an n-well region relative to the substrate;

forming a BPSG insulator over the n-well region;

etching away an area of the BPSG for definition of a contact hole, and etching an area encircling the contact hole;

forming n+ regions in the n-well regions encircling the contact hole;

depositing titanium in the contact hole; and

annealing the titanium to form a silicide interface to the n-well region.

10. A method in accordance with claim 9 and further comprising depositing tungsten into the contact hole.

11. A method in accordance with claim 10 wherein the tungsten is deposited by chemical vapor deposition.

12. A method in accordance with claim 10 and further comprising planarizing the tungsten.

13. A method of forming an integrated circuit including a Schottky diode, the method comprising:

providing an n-type substrate;

defining a p-well region relative to the substrate;

forming a BPSG insulator over the p-well region;

etching away an area of the BPSG for definition of a contact hole, and etching an area encircling the contact hole;

forming p+ regions in the p-well regions encircling the contact hole;

depositing titanium in the contact hole; and

annealing the titanium to form a silicide interface to the p-well region.

14. A method in accordance with claim 13 and further comprising depositing tungsten into the contact hole.

15. A method in accordance with claim 14 wherein the tungsten is deposited by chemical vapor deposition.

16. A method in accordance with claim 14 and further comprising planarizing the tungsten.

17. A method of forming an integrated circuit including a Schottky diode, the method comprising:

providing a substrate of a first conductivity type;

defining a region of a second conductivity type relative to the substrate;

forming an insulator over the second conductivity type region;

removing an area of the insulator for definition of a contact hole, and removing an area encircling the contact hole;

forming highly doped regions of the second conductivity type in second conductivity type regions encircling the contact hole;

depositing a Schottky metal in the contact hole; and

annealing the metal to form a silicide interface to the second conductivity type region.

18. A method in accordance with claim 17 wherein forming an insulator comprises forming a BPSG insulator.

19. A method in accordance with claim 17 and further comprising depositing tungsten into the contact hole.

20. A method in accordance with claim 17 wherein the tungsten is deposited by chemical vapor deposition.

21. A method in accordance with claim 18 and further comprising planarizing the tungsten.

22. A method of forming an integrated circuit including a Schottky diode, the method comprising:

providing a n-type substrate;

defining a p-type region relative to the n-type substrate;

forming an insulator over the p-type region;

removing an area of the insulator for definition of a contact hole, and removing an area encircling the contact hole;

forming p+ regions in the p-type regions encircling the contact hole;

depositing a Schottky metal in the contact hole; and

annealing the Schottky metal to form a silicide interface to the p-type region.

23. A method in accordance with claim 22 and further comprising depositing tungsten into the contact hole.

24. A method in accordance with claim 23 wherein the tungsten is deposited by chemical vapor deposition.

25. A method in accordance with claim 23 and further comprising planarizing the tungsten.