Multiple input-type and multiple signal processing-type device and related methods

• US 6,492,903 B1
• Filed: 11/30/2001
• Issued: 12/10/2002
• Est. Priority Date: 11/30/2001
• Status: Expired due to Fees

• Current Assignee: North South Holdings Incorporated (Spherix Incorporated)
• Original Assignee: Harris Corporation (L3Harris Technologies, Inc.)
• Inventors: Ranon, Peter M.
• Primary Examiner(s): POPE, DARYL C
• Application Number:
  US09/998,703
• Time in Patent Office: 375 Days
• Field of Search: 340/521, 340/523, 340/517, 340/531, 340/533, 340/534, 340/538
• US Class Current: 340/521
• CPC Class Codes: G06F 18/40 Software arrangements specially adapted for pattern recognition, e.g. user interfaces or toolboxes therefor
• CPC Class Codes: G06F 2218/00 Aspects of pattern recognition specially adapted for signal processing

Abstract

A multiple input-type and multiple signal processing-type device may include an input stage for receiving a plurality of different analog signal types, and down and up-converters for respectively downwardly converting first signal types and upwardly converting second signal types to a desired processing frequency range. Furthermore, the device may include an analog-to-digital converter (ADC) for converting analog signals at the desired processing frequency range into digital signals, and time and frequency domain signal processing sections connected to the ADC for processing the digital signals. Furthermore, the device may advantageously include a user selector input for permitting a user to selectively activate one of the down-converter or up-converter and one of the time or frequency domain signal processing sections. Additionally, a signal recognition processor may be included for performing signal recognition to determine whether to selectively activate the down-converter or up-converter and the time domain or frequency domain signal processing sections.

Claims

1. A multiple input-type and multiple signal processing-type device comprising:

an input stage for receiving a plurality of different analog signal types;

a down-converter for downwardly converting first signal types to a desired processing frequency range;

an up-converter for upwardly converting second signal types to the desired processing frequency range;

an analog-to-digital converter (ADC) for converting analog signals at the desired processing frequency range into digital signals;

a time domain signal processing section connected to said ADC for performing time domain signal processing on the digital signals;

a frequency domain signal processing section connected to said ADC for performing frequency domain signal processing on the digital signals;

a user selector input for permitting a user to selectively activate one of said down-converter or up-converter, and to selectively activate one of said time domain or frequency domain signal processing sections; and

a signal recognition processor for performing signal recognition to determine whether to selectively activate said down-converter or up-converter, and to determine whether to selectively activate said time domain or frequency domain signal processing sections.

2. The multiple input-type and multiple signal processing-type device of claim 1 wherein said time domain signal processing section comprises a convolution module for performing pattern recognition on the digital signals.

3. The multiple input-type and multiple signal processing-type device of claim 1 wherein said time domain signal processing section comprises a pulse threshold crossing module for performing waveform detection on the digital signals.

4. The multiple input-type and multiple signal processing-type device of claim 1 wherein said frequency domain signal processing section comprises a convolution module for performing pattern recognition on the digital signals.

5. The multiple input-type and multiple signal processing-type device of claim 1 wherein said frequency domain signal processing section comprises a spectral threshold crossing module for performing waveform detection on the digital signals.

6. The multiple input-type and multiple signal processing-type device of claim 5 wherein said spectral threshold crossing module comprises a constant false alarm rate (CFAR) module.

7. The multiple input-type and multiple signal processing-type device of claim 6 wherein said spectral threshold crossing module further comprises:

a magnitude calculation module upstream from said CFAR module; and

a DC term elimination module upstream from said magnitude calculation module.

8. The multiple input-type and multiple signal processing-type device of claim 5 wherein said spectral threshold crossing module comprises at least one of a fast Fourier transform (FFT) module and an inverse FFT (IFFT) module.

9. The multiple input-type and multiple signal processing-type device of claim 1 further comprising at least one filter coupling the analog signals at the desired processing frequency to said ADC.

10. The multiple input-type and multiple signal processing-type device of claim 1 wherein the plurality of different analog signal types comprise at least two of optical signals, radio frequency (RF) signals, seismic signals, and acoustic signals.

11. A multiple input-type and multiple signal processing-type device comprising:

an input stage for receiving a plurality of different signal types;

a down-converter for downwardly converting first signal types to a desired processing frequency range;

an up-converter for upwardly converting second signal types to the desired processing frequency range;

an analog-to-digital converter (ADC) for converting analog signals at the desired processing frequency range into digital signals;

a time domain signal processing section connected to said ADC for performing time domain signal processing on the digital signals;

a frequency domain signal processing section connected to said ADC for performing frequency domain signal processing on the digital signals; and

a user selector input for permitting a user to selectively activate one of said down-converter or up-converter, and to selectively activate one of said time domain or frequency domain signal processing sections.

12. The multiple input-type and multiple signal processing-type device of claim 11 wherein said time domain signal processing section comprises a convolution module for performing pattern recognition on the digital signals.

13. The multiple input-type and multiple signal processing-type device of claim 11 wherein said time domain signal processing section comprises a pulse threshold crossing module for performing waveform detection on the digital signals.

14. The multiple input-type and multiple signal processing-type device of claim 11 wherein said frequency domain signal processing section comprises a convolution module for performing pattern recognition on the digital signals.

15. The multiple input-type and multiple signal processing-type device of claim 11 wherein said frequency domain signal processing section comprises a spectral threshold crossing module for performing waveform detection on the digital signals.

16. The multiple input-type and multiple signal processing-type device of claim 15 wherein said spectral threshold crossing module comprises a constant false alarm rate (CFAR) module.

17. The multiple input-type and multiple signal processing-type device of claim 16 wherein said spectral threshold crossing module further comprises:

a magnitude calculation module upstream from said CFAR module; and

an interference signal elimination module upstream from said magnitude calculation module.

18. The multiple input-type and multiple signal processing-type device of claim 15 wherein said spectral threshold crossing module comprises at least one of a fast Fourier transform (FFT) module and an inverse FFT (IFFT) module.

19. The multiple input-type and multiple signal processing-type device of claim 11 further comprising at least one filter coupling the analog signals at the desired processing frequency to said ADC.

20. The multiple input-type and multiple signal processing-type device of claim 11 wherein the plurality of different analog signal types comprise at least two of optical signals, radio frequency (RF) signals, seismic signals, and acoustic signals.

21. A multiple input-type and multiple signal processing-type device comprising:

an input stage for receiving a plurality of different analog signal types;

a down-converter for downwardly converting first signal types to a desired processing frequency range;

an up-converter for upwardly converting second signal types to the desired processing frequency range;

an analog-to-digital converter (ADC) for converting analog signals at the desired processing frequency range into digital signals;

a time domain signal processing section connected to said ADC for performing time domain signal processing on the digital signals;

a frequency domain signal processing section connected to said ADC for performing frequency domain signal processing on the digital signals; and

a signal recognition processor for performing signal recognition to determine whether to selectively activate said down-converter or up-converter, and to determine whether to selectively activate said time domain or frequency domain signal processing sections.

22. The multiple input-type and multiple signal processing-type device of claim 21 wherein said time domain signal processing section comprises a convolution module for performing pattern recognition on the digital signals.

23. The multiple input-type and multiple signal processing-type device of claim 21 wherein said time domain signal processing section comprises a pulse threshold crossing module for performing waveform detection on the digital signals.

24. The multiple input-type and multiple signal processing-type device of claim 21 wherein said frequency domain signal processing section comprises a convolution module for performing pattern recognition on the digital signals.

25. The multiple input-type and multiple signal processing-type device of claim 21 wherein said frequency domain signal processing section comprises a spectral threshold crossing module for performing waveform detection on the digital signals.

26. The multiple input-type and multiple signal processing-type device of claim 25 wherein said spectral threshold crossing module comprises a constant false alarm rate (CFAR) module.

27. The multiple input-type and multiple signal processing-type device of claim 26 wherein said spectral threshold crossing module further comprises:

a magnitude calculation module upstream from said CFAR module; and

a DC term elimination module upstream from said magnitude calculation module.

28. The multiple input-type and multiple signal processing-type device of claim 25 wherein said spectral threshold crossing module comprises at least one of a fast Fourier transform (FFT) module and an inverse FFT (IFFT) module.

29. The multiple input-type and multiple signal processing-type device of claim 21 further comprising at least one filter coupling the analog signals at the desired processing frequency to said ADC.

30. The multiple input-type and multiple signal processing-type device of claim 21 wherein the plurality of different analog signal types comprise at least two of optical signals, radio frequency (RF) signals, seismic signals, and acoustic signals.

31. A method for processing multiple signals having different signal types, the method comprising:

providing a multiple input-type and multiple signal processing-type device comprising an input stage for receiving a plurality of different signal types, a down-converter for downwardly converting first signal types to a desired processing frequency range, an up-converter for upwardly converting second signal types to the desired processing frequency range, an analog-to-digital converter (ADC) for converting analog signals at the desired processing frequency range into digital signals, a time domain signal processing section connected to the ADC for performing time domain signal processing on the digital signals, and a frequency domain signal processing section connected to the ADC for performing frequency domain signal processing on the digital signals;

configuring the multiple input-type and multiple signal processing-type device to permit a user to selectively activate one of the down-converter or up-converter; and

configuring the multiple input-type and multiple signal processing-type device to permit the user to selectively activate one of the time domain or frequency domain signal processing sections.

32. The method of claim 31 wherein the time domain signal processing section comprises a convolution module for performing pattern recognition on the digital signals.

33. The method of claim 31 wherein the time domain signal processing section comprises a pulse threshold crossing module for performing waveform detection on the digital signals.

34. The method of claim 31 wherein the frequency domain signal processing section comprises a convolution module for performing pattern recognition on the digital signals.

35. The method of claim 31 wherein the frequency domain signal processing section comprises a spectral threshold crossing module for performing waveform detection on the digital signals.

36. A method for processing multiple signals having different signal types, the method comprising:

receiving a plurality of different signal types;

downwardly converting first signal types to a desired processing frequency range using a down-converter;

upwardly converting second signal types to the desired processing frequency range using an up-converter;

converting analog signals at the desired processing frequency range into digital signals;

performing time domain signal processing on the digital signals using a time domain processor and performing frequency domain signal processing on the digital signals using a frequency domain processor; and

performing signal recognition to determine whether to selectively activate the down-converter or up-converter, and to determine whether to selectively activate the time domain or frequency domain signal processors.

37. The method of claim 36 wherein performing time domain signal processing comprises performing pattern recognition on the digital signals.

38. The method of claim 36 wherein performing time domain signal processing comprises performing waveform detection on the digital signals.

39. The method of claim 36 wherein performing frequency domain signal processing comprises performing pattern recognition on the digital signals.

40. The method of claim 36 wherein performing frequency domain signal processing comprises performing waveform detection on the digital signals.