Automated counting insect electrocutor

• US 6,493,363 B1
• Filed: 05/15/1998
• Issued: 12/10/2002
• Est. Priority Date: 11/09/1995
• Status: Expired due to Fees

• Current Assignee: Agricutlture United States of Americas The As Represented By The Secretary of, University of Florida (State University System of Florida)
• Original Assignee: The United States of America As Represented By The Secretary of Agriculture
• Inventors: Weaver, David K., Dagan, Aharon, Shuman, Dennis
• Primary Examiner(s): TON, DANG T
• Application Number:
  US09/079,163
• Time in Patent Office: 1,670 Days
• Field of Search: 370/359, 370/263, 370/541, 370/539, 431/12, 431/14, 431/321, 701/207, 702/35, 702/116, 702/183, 735/87, 340/506, 340/942, 324/536, 342/411, 359/118, 379/69, 455/158.3
• US Class Current: 370/539
• CPC Class Codes: H04L 2101/622 Layer-2 addresses, e.g. medium access control [MAC] addresses
• CPC Class Codes: H04L 61/00 Network arrangements, protocols or services for addressing or naming

Abstract

A system for automated monitoring of pest insects having sensor units which include an insect electrocutor trap modified by the inclusion of electronic circuitry to sense, count and store the numbers of insects killed by it. The numbers of insects can be displayed at the electrocutor and/or transmitted to a remote computer that can acquire and time-stamp counts from thousands of distributed electrocutors for subsequent analysis and display. The data from the units is transmitted through a communications system which is organized into a two or more levels of multiplexing modules. Each multiplexing module has a plurality of inputs from next level multiplexing modules, with the exception of the last level multiplexing modules. The last level multiplexing modules have a plurality of inputs from sensor modules outputting data. A default condition is set up to allow transmission of address information from the computer to all the multiplexing modules to allow the programming of each multiplexing module to select one of its inputs. At the appropriate time, timing circuitry in the multiplexing modules reverse the direction of communication of the multiplexing modules to allow a single sensor module to transmit its data to the computer, in accordance with the address information.

Claims

1. An automated insect monitoring system comprising:

a plurality of sensor units wherein each of said units comprises;

an insect electrocutor trap operatively connected to a high voltage generator;

a sense coil operatively connected to said generator;

a signal conditioning circuit operatively connected to said coil;

a digital register operatively connected to said circuit; and

a communications system, operatively connected to said register of each of units of said plurality of sensor units, for receiving data from a plurality of spatially separated locations containing sensor units comprising;

a computer operatively connected to said register of each of units of said plurality of sensor units;

a first multiplexing module operably connected to the computer;

a plurality of second multiplexing modules each operatively connected to the first multiplexing module as a plurality of inputs for the first multiplexing module;

a plurality of intermediate levels, each level containing a plurality of multiplexing modules, each module operably connected to a lower level module as a plurality of inputs for said lower level module;

a plurality of last level multiplexing modules, each operatively connected to a lower intermediate level multiplexing module as a plurality of inputs for the intermediate level multiplexing module; and

a plurality of data registers, each operatively connected to a last level multiplexing module, each of the last level multiplexing modules having a plurality of inputs for receiving data from two or more data registers;

a multiplexer; and

an addressing circuit receiving address information transmitted by the computer and programming the multiplexer to select one of the plurality of inputs of the multiplexing module as an output to be sent to the computer in response to the received address information.

2. The system of claim 1 wherein each of the multiplexing modules includes:

a direction controller controlling a direction of communication to allow receipt of address information from the computer, or to allow transmission of data from one of the plurality of data registers along a common pathway.

3. The system of claim 2 wherein the direction controller includes first and second monostable, multivibrator circuits connected in series;

the first monostable, multivibrator circuit being activated for a predetermined period of time by the initial receipt of the address information by the multiplexing module to allow completion of an addressing sequence; and

the second monostable, multivibrator circuit being activated for a predetermined period of time by the deactivation of the first monostable, multivibrator circuit to reverse the direction of communication of the respective multiplexing module along a common pathway.

4. The communications system of claim 3 wherein each multiplexing module includes at least one transceiver having a receiver and a transmitter;

and wherein

in each multiplexing module each second monostable, multivibrator circuit is connected to the receiver and transmitter of each of the at least one transceiver to enable and disable each receiver and transmitter.

5. The system of claim 3 wherein the computer, the multiplexing modules, and the data registers are connected to each other via serial communications links;

and wherein each multiplexing module includes;

an upstream transceiver having a receiver for receiving the

address information from the computer and a transmitter for transmitting data from a register to the computer, the second monostable, multivibrator circuit being connected to the receiver to disable and to the transmitter to enable when the second monostable, multivibrator circuit is activated; and

wherein

in each multiplexing module the addressing circuit includes a serial-to-parallel conversion circuit, connected to the receiver of the upstream transceiver and to the multiplexer converting received serial address information to parallel address information to program the multiplexer.

6. The system of claim 5 wherein

the serial communications links are pairs of twisted wire;

and

the serial-to-parallel conversion circuit in each multiplexing module is a UART.

7. The system of claim 2 wherein each of the plurality of data registers are included in respective sensor modules, each sensor module repetitively transmitting data to a respective last level multiplexing module.

8. The system of claim 7 wherein each of said sensor modules further includes:

a transmit strobe generator, operatively connected to said sensor modules and a parallel-to-serial converter, repetitively outputting a strobe signal;

a parallel-to-serial converter, connected to the respective data register and the transmit strobe generator, converting parallel data output from the respective data register to serial data when a strobe signal is received from the transmit strobe generator; and

a transmitter operatively connected to said parallel-to-serial converter, wherein said transmitter transmits the serial data to a respective one of the last level multiplexing modules.

9. The system of claim 4 further comprising:

a computer interface module connecting the first multiplexing module to the computer including;

a first transceiver receiving address information transmitted by the computer and transmitting data to the computer;

a second transceiver connected to the first transceiver having a transmitter to transmit address information received by the first transceiver to the first multiplexing module, and a receiver receiving data from the first multiplexing module and outputting data to the transmitter of the first transceiver;

a first direction controller connected to an enable/disable input of the transmitter of the second transmitter; and

a second direction controller connected to an enable/disable input of the receiver of the second transceiver.

10. The system of claim 9 wherein the first and second direction controllers of the computer interface module include:

a first monostable, multivibrator circuit connected to a first transceiver; and

a second monostable, multivibrator circuit connected in series to the respective first monostable, multivibrator circuit being activated by the deactivation of the respective first monostable, multivibrator circuit, and wherein

the second monostable, multivibrator circuit of the first direction controller is connected to the enable/disable input of the transmitter of the second transceiver; and

the second monostable, multivibrator circuit of the second direction controller is connected to the enable/disable input of the receiver of the second transceiver.

11. The system of claim 1 further comprising:

a plurality of serial links for directly connecting the first multiplexing module to each of the second multiplexing modules; and

a plurality of third multiplexing modules arranged in groups, each group of third multiplexing modules operatively connecting to a corresponding second multiplexing module to a plurality of data registers.

12. The system of claim 11 wherein

each of the second multiplexing modules includes an address propagation circuit allowing or preventing subsequently received address information to be communicated to the corresponding group of third multiplexing module in response to an output line of the addressing circuit.

13. The system of claim 12 wherein

the output line of the addressing circuit outputs a high or low value in response to previously received address information transmitted by the computer.

14. The system of claim 13 wherein

the address propagation circuit is an OR gate.

15. The system of claim 1 wherein

said first multiplexing module is directly connected to each of the plurality of second multiplexing modules via respective serial links;

the first multiplexing module includes a plurality of transceivers each respectively connected to a first end of a serial link; and

each of the second multiplexing modules includes a transceiver respectively connected to a second end of said serial link.

16. The system of claim 15 wherein each of the serial links are RS-422 bidirectional pathways.

17. The system of claim 15 wherein each of the multiplexing modules are positioned to minimize the total of the lengths of the serial links.

18. The system of claim 1 wherein

the computer repetitively sends address information to receive data from the same data register multiple times in order to ensure the accuracy of the received data.