Phase detectors in carrier recovery for offset QAM and VSB

• US 6,493,409 B1
• Filed: 11/03/1999
• Issued: 12/10/2002
• Est. Priority Date: 11/03/1998
• Status: Expired due to Fees

• Current Assignee: Avago Technologies General IP PTE Limited (Broadcom, Inc.)
• Original Assignee: Broadcom Corporation (Broadcom, Inc.)
• Inventors: Krafft, Stephen E., Liu, Tian-Min, Lin, Thuji S.
• Primary Examiner(s): TSE, YOUNG TOI
• Application Number:
  US09/433,732
• Time in Patent Office: 1,133 Days
• Field of Search: 375/232, 375/233, 375/235, 375/279, 375/281, 375/284, 375/326-327, 375/329, 375/332, 375/344, 375/345, 375/346, 375/375-376, 329/304, 329/307, 329/308, 348/725, 348/726
• US Class Current: 375/375
• CPC Class Codes: H04B 1/68 for wholly or partially suppressing the carrier or one side band
• CPC Class Codes: H04L 2025/03382 Single of vestigal sideband
• CPC Class Codes: H04L 2025/0342 QAM
• CPC Class Codes: H04L 2025/0349 as a feedback filter
• CPC Class Codes: H04L 2025/03503 as a combination of feedback and prediction filters
• CPC Class Codes: H04L 2027/0032 at baseband and passband
• CPC Class Codes: H04L 2027/0042 the equaliser providing the offset correction per se
• CPC Class Codes: H04L 2027/0057 quadrature phase
• CPC Class Codes: H04L 2027/0067 Phase error detectors
• CPC Class Codes: H04L 2027/0087 Out-of-band signals, (e.g. pilots)
• CPC Class Codes: H04L 25/03057 with a recursive structure H04L25/03031 takes precedence
• CPC Class Codes: H04L 27/02 Amplitude-modulated carrier systems, e.g. using on-off keying; Single sideband or vestigial sideband modulation H04L27/32 takes precedence
• CPC Class Codes: H04L 27/066 Carrier recovery circuits H04L27/2271 takes precedence
• CPC Class Codes: H04L 27/2273 associated with quadrature demodulation, e.g. Costas loop
• CPC Class Codes: H04L 27/3427 in which the constellation is the n - fold Cartesian product of a single underlying two-dimensional constellation
• CPC Class Codes: H04L 27/3827 in which the carrier is recovered using only the demodulated baseband signals
• CPC Class Codes: H04N 11/24 High-definition television systems
• CPC Class Codes: H04N 21/426 Internal components of the client ; Characteristics thereof H04N5/44 takes precedence
• CPC Class Codes: H04N 5/21 Circuitry for suppressing or minimising disturbance, e.g. moiré or halo
• CPC Class Codes: H04N 5/211 Ghost signal cancellation H04N23/81 takes precedence
• CPC Class Codes: H04N 5/44 : Receiver circuitry for the reception of television signals according to analogue transmission standards H04N5/14 takes precedence
• CPC Class Codes: H04N 5/455 : Demodulation-circuits
• CPC Class Codes: H04N 5/46 : for receiving on more than one standard at will deflecting circuits of multi-standard receivers H04N3/27

Abstract

Improved carrier recovery, symbol timing, and carrier phase tracking systems and methods suitable for use in connection with a dual-mode QAM/VSB receiver system are disclosed. Carrier and phase recovery systems operate on complex signals representing symbols having the same time stamp for each phase error term. in-phase signals are sampled twice a symbol at the in-phase symbol sampling time and at the quadrature-phase symbol sampling time. The signals are de-multiplexed to generate I and X_I data streams, where I represents the in-phase sampling time signals and X_I represents mid-symbol point sample times. A similar procedure is carrier out on quadrature-phase signals. When the in-phase signal is de-multiplexed to generate a symbol I, the quadrature-phase signal is de-multiplexed to generate its mid-symbol point X_Q. Both I and Q are decoded in a decision device to define a symbol error term, which is combined with the opposite mid-symbol signal to define a phase error term P_I and P_Q for each rail. In both cases, the symbol (I) decision (Î), and mid-symbol (X_Q) in each phase error term (P_I) computation will have the same prime index.

Claims

1. In an Offset QAM receiver that recovers in-phase signals sampled at in-phase sampling times and quadrature-phase signals sampled at quadrature-phase sampling times, a phase detector comprising:

means for separating the in-phase signals into a first data stream at the in-phase sampling times and a second data stream at the quadrature-phase sampling times;

means for separating the quadrature-phase signals into a third data stream at the quadrature-phase sampling times and a fourth data stream at the in-phase sampling times;

means for generating a fifth data steam representing tentative decisions from the first data stream;

means for generating a sixth data steam representing tentative decisions from the third data stream;

means for comparing the first and fifth data streams to generate a first error signal;

means for comparing the third and sixth data streams to generate a second error signal;

means for combining the first error signal and the fourth data stream to form a first phase error signal; and

means for combining the second error signal and the second data stream to form a second phase error signal.

2. The phase detector of claim 1, additionally comprising means for combining the first and second phase error signals.

3. The phase detector of claim 2, in which the means for generating the fifth and sixth data streams comprise decision devices.

4. The phase detector of claim 3, additionally comprising:

a voltage controlled oscillator (VCO) and means for coupling the combined phase error signals to the VCO to reduce the combined phase error.

5. The phase detector of claim 4, additionally comprising a phase de-rotator controlled by the VCO.

6. The phase detector of claim 1 designed alternatively for phase detection of a VSB signal additionally comprising:

means for separating the VSB signal into in-phase and quadrature phase data streams;

means for generating a data stream representing tentative decisions from the in-phase data stream;

means for comparing the in-phase data stream and the data stream representing tentative decisions to generate an error signal; and

means for combining the error signal and the quadrature phase data stream.

7. The phase detector of claim 6, in which the means for generating the data stream representing tentative decisions from the in-phase data stream comprises decision devices.

8. The phase detector of claim 7, additionally comprising a voltage controlled oscillator (VCO) and means for coupling the combined phase error signals and quadrature phase data stream to the VCO to reduce any difference therebetween.