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Content addressable memory device having selective cascade logic and method for selectively combining match information in a CAM device

  • US 6,493,793 B1
  • Filed: 06/16/2000
  • Issued: 12/10/2002
  • Est. Priority Date: 06/16/2000
  • Status: Expired due to Fees
First Claim
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1. A content addressable memory (CAM) device comprising:

  • an array including a plurality of rows of CAM cells each coupled to a match line;

    match flag logic having inputs coupled to the match lines, and having an output to provide an internal match flag signal indicative of match conditions between a comparand word and data stored in the array;

    a plurality of match flag inputs to receive input match information from one or more other CAM devices;

    a match flag output to provide output match information to one or more other CAM devices; and

    cascade logic coupled to the plurality of match flag inputs and the match flag output for selecting which input match information received from the match flag inputs is logically combined with the internal match flag to generate the output match information.

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