Semiconductor device manufacturing method

• US 6,495,379 B2
• Filed: 07/24/2001
• Issued: 12/17/2002
• Est. Priority Date: 08/03/2000
• Status: Expired due to Term

• Current Assignee: Semiconductor Components Industries LLC (ON Semiconductor Corporation)
• Original Assignee: Sanyo Electric Company Limited (Panasonic Holdings Corporation)
• Inventors: Iketani, Koji
• Primary Examiner(s): Fahmy, Wael
• Assistant Examiner(s): TOLEDO, FERNANDO L
• Application Number:
  US09/911,924
• Publication Number:
  US 20020016013A1
• Time in Patent Office: 511 Days
• Field of Search: 438/15, 438/14, 438/118, 438/343, 438/FOR.101, 257/787, 156/264, 156/226.1
• US Class Current: 438/15
• CPC Class Codes: H01L 21/56 Encapsulations, e.g. encapsulation layers, coatings
• CPC Class Codes: H01L 21/561 Batch processing
• CPC Class Codes: H01L 21/568 Temporary substrate used as encapsulation process aid H01L21/4832 and H01L21/566 take precedence
• CPC Class Codes: H01L 21/6835 using temporarily an auxiliary support
• CPC Class Codes: H01L 22/20 Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
• CPC Class Codes: H01L 2221/68331 of passive members, e.g. die mounting substrate
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/45015 being circular
• CPC Class Codes: H01L 2224/45099 Material
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/85 using a wire connector
• CPC Class Codes: H01L 2224/85444 Gold (Au) as principal constituent
• CPC Class Codes: H01L 2224/97 the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 23/3121 a substrate forming part of the encapsulation
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 24/97 the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01004 : Beryllium [Be]
• CPC Class Codes: H01L 2924/01005 : Boron [B]
• CPC Class Codes: H01L 2924/01006 : Carbon [C]
• CPC Class Codes: H01L 2924/01019 : Potassium [K]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01047 : Silver [Ag]
• CPC Class Codes: H01L 2924/01074 : Tungsten [W]
• CPC Class Codes: H01L 2924/01078 : Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/09701 : Low temperature co-fired ceramic [LTCC]
• CPC Class Codes: H01L 2924/12041 : LED
• CPC Class Codes: H01L 2924/1305 : Bipolar Junction Transistor [BJT]
• CPC Class Codes: H01L 2924/13091 : Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/15787 : Ceramics, e.g. crystalline carbides, nitrides or oxides
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/19043 : being a resistor
• CPC Class Codes: H01L 2924/207 : Diameter ranges

Abstract

According to the invention, the characteristics of semiconductor devices are measured while these devices are adhered to an adhesive sheet, and the semiconductor devices, at this time, are aligned in a predetermined manner. Further, a semiconductor device is captured in the field of view of a camera to identify its location, and the characteristics of semiconductor devices, which are adjacent to the semiconductor device, are measured, without a position recognition process being required for these devices. Consequently, a considerable reduction in working time is realized and is accompanied by an improvement in productivity.

Claims

1. A manufacturing method for a semiconductor device comprising steps of:

fixing semiconductor chips onto a substrate;

covering the semiconductor chips fixed onto the substrate with a common resin layer;

gluing an adhesive sheet onto the resin layer;

cutting the substrate and the resin layer in a state that the adhesive sheet is glued to the resin layer; and

measuring the semiconductor devices in a state that the adhesive sheet is glued to the resin layer,

wherein positions of external electrodes on the substrate of one of the semiconductor chips are identified,

wherein the measurement is performed for the semiconductor chip whose position is identified, and for another semiconductor chips located around the semiconductor chip and the positions of the semiconductor chips are not identified.

2. A manufacturing method for a semiconductor device according to claim 1,

wherein the semiconductor chips whose position are not identified are four semiconductor chips located around the semiconductor chip whose position is identified.

3. A manufacturing method for a semiconductor device according to claim 1,

wherein the measurement is performed by using of needles of probes,

wherein the position of the semiconductor chip is identified by using of a camera,

wherein, for the measurement of the semiconductor chips, the camera and the needles of a probes are mounted at fixed positions, and the semiconductor chips are measured while being moved.

4. A manufacturing method for a semiconductor device according to claim 3,

wherein, to identify the position of an electrode on the substrate of the semiconductor chip, the field of view of the camera is reduced by masking to a distance equivalent in size to one of the semiconductor chips.

5. A manufacturing method for a semiconductor device according to claim 1,

wherein the substrate and the resin layer which are cut are integrally supported by the adhesive sheet.

6. A manufacturing method for a semiconductor device according to claim 1,

wherein the external electrodes are provided on the reverse surface of the substrate and electrically connected to the semiconductor chips.