Interlayer oxide containing thin films for high dielectric constant application

• US 6,495,878 B1
• Filed: 08/02/1999
• Issued: 12/17/2002
• Est. Priority Date: 08/02/1999
• Status: Expired due to Term

• Current Assignee: Matsushita Electric Industrial Company Limited (Panasonic Holdings Corporation), Symetrix Corporation
• Original Assignee: Matsushita Electric Industrial Company Limited (Panasonic Holdings Corporation), Symetrix Corporation
• Inventors: Paz de Araujo, Carlos A., Hayashi, Shinichiro, Joshi, Vikram, Solayappan, Narayan, Cuchiaro, Joseph D.
• Primary Examiner(s): Chaudhuri, Olik
• Assistant Examiner(s): Weiss, Howard
• Application Number:
  US09/365,628
• Time in Patent Office: 1,233 Days
• Field of Search: 257/295, 257/310
• US Class Current: 257/310
• CPC Class Codes: H01L 21/02197 the material having a perovskite structure, e.g. BaTiO3
• CPC Class Codes: H01L 21/02205 the layer being characterised by the precursor material for deposition
• CPC Class Codes: H01L 21/02282 liquid deposition, e.g. spin-coating, sol-gel techniques, spray coating
• CPC Class Codes: H01L 21/02348 treatment by exposure to UV light
• CPC Class Codes: H01L 21/31691 with perovskite structure
• CPC Class Codes: H01L 27/0629 in combination with diodes, or resistors, or capacitors

Abstract

A high dielectric constant insulator including a thin film of a metal oxide selected from the group consisting of tungsten-bronze-type oxides, pyrochlore-type oxides, and combinations of Bi₂O₃ with an oxide selected from the group consisting of perovskites and pyrochlore-type oxides. An embodiment contains metal oxides represented by the general stoichiometric formulas AB₂O₆, A₂B₂O₇ and A₂Bi₂B₂O₁₀, wherein A represents A-site atoms selected from the group of metals consisting of Ba, Bi, Sr, Pb, Ca, K, Na and La; and B represents B-site atoms selected from the group of metals consisting of Ti, Zr, Ta, Hf, Mo, W and Nb. Preferably, the metal oxides are (Ba_xSr_1−x)(Ta_yNb_1−y)₂O₆, where 0≦x≦1.0 and 0≦y≦1.0; (Ba_xSr_1−x)₂(Ta_yNb_1−Y)₂O₇, where 0≦x≦1.0 and 0≦y≦1.0; and (Ba_xSr_1−x)₂Bi₂(Ta_yNb_1−y)₂O₁₀, where 0≦x≦1.0 and 0≦y≦1.0. Thin films according to the invention have a relative dielectric constant ≧40, and preferably about 100. The value of Vcc in the metal oxides of the invention is close to zero. The value of Tcc is <1000 ppm, preferably <100.

Claims

1. An integrated circuit comprising a non-ferroelectric, high dielectric constant insulator, said insulator including a thin film of a metal oxide selected from the group consisting of combinations of a non-perovskite interlayer oxide of Bi, Sc, Y, La, Sb, Cr or Tl with an oxide selected from the group consisting of perovskites and pyrochlore oxides.

2. An integrated circuit as in claim 1 wherein said interlayer oxide is Bi₂O₃.

3. An integrated circuit as in claim 1 wherein said metal oxide is a combination of Bi₂O₃ with a pyrochlore-type oxide having a formula A₂B₂O₇, wherein A represents A-site atoms selected from the group of metals consisting of Ba, Bi, Sr, Pb, Ca, K, Na and La;

and B represents B-site atoms selected from the group of metals consisting of Ti, Zr, Ta, Hf, Mo, W and Nb.

4. An integrated circuit as in claim 3 wherein said pyrochlore oxide has a formula (Ba_xSr₁₋

x)₂(Ta_yNb<sub>1−

y</sub>)₂O₇, wherein 0≦

x≦

1.0 and 0≦

y≦

1.0.

5. An integrated circuit as in claim 3 wherein said pyrochlore oxide has a formula (Ba_xSr₁₋

x)₂Ta₂O₇, wherein 0≦

x≦

1.0 and 0≦

y≦

1.0.

6. An integrated circuit as in claim 1 wherein said thin film has a thickness ranging from 1 nm to 500 nm.

7. An integrated circuit as in claim 1, further comprising a first electrode and a second electrode, said thin film located between said first and second electrodes.

8. An integrated circuit as in claim 1 wherein said thin film is part of a memory cell.

9. An integrated circuit as in claim 1 wherein said thin film is part of a bypass capacitor.

10. An integrated circuit as in claim 1 wherein said thin film is part of a transistor.

11. An integrated circuit as in claim 10 wherein said thin film comprises a gate insulator.

12. An integrated circuit as in claim 11 wherein said transistor is a ferroelectric FET including a substrate and a ferroelectric layer and said gate insulator is located between,said ferroelectric layer and said substrate.

13. An integrated circuit as in claim 1 wherein said thin film is part of a MMIC.

14. An integrated circuit as in claim 1 wherein said thin film comprises an interlayer dielectric.

15. An integrated circuit as in claim 1 wherein said thin film is a virtual stacked structure comprising a layer of said, oxide alternating with a layer selected from the group consisting of perovskite layers and pyrochlore oxide layers.

16. An integrated circuit as in claim 15 wherein said interlayer oxide comprises Bi₂O₃.

17. An integrated circuit comprising a high dielectric constant insulator, said insulator Including a thin film of a metal oxide, said thin film being an actual stacked structure comprising a layer of a non-perovskite interlayer oxide of Bi, Sc, Y, La, Sb, Cr or Tl having an interface with a non-ferroelectric, metal oxide layer selected from the group consisting of perovskite layers and pyrochlore oxide layers.

18. An integrated circuit as in claim 17 wherein said interlayer oxide layer comprises Bi₂O₃.

19. An integrated circuit having a metal oxide thin film comprising an actual stacked structure including a layer of a non-perovskite interlayer oxide of Bi, Sc, Y, La, Sb, Cr or Tl alternating with a metal oxide layer selected from the group consisting of perovskite layers and pyrochlore oxide layers, said thin film including at least three interfaces between said interlayer oxide and said metal oxide.

20. An integrated circuit as in claim 19 wherein said interlayer oxide layer comprises Bi₂O₃.

21. An integrated circuit as in claim 19 wherein said metal oxide is non-ferroelectric.

22. An integrated circuit as in claim 19 wherein said metal oxide is ferroelectric.

23. An integrated circuit comprising a non-ferroelectric, high dielectric constant insulator thin film, said thin film being an actual stacked structure comprising a layer of a non-perovskite interlayer oxide of Bi, Sc, Y, La, Sb, Cr or Tl alternating with a metal oxide layer selected from the group consisting of perovskite layers, and pyrochlore oxide layers.

24. An integrated circuit as in claim 23 wherein said interlayer oxide layer comprises Bi₂O₃.

25. An integrated circuit comprising a thin film of a metal oxide, said thin film being a virtual stacked structure comprising layer of a non-perovskite interlayer oxide of Bi, Sc, Y, La, Sb, Cr or Tl alternating with a metal oxide layer selected from the group consisting of and pyrochlore oxide layers.

26. An integrated circuit as in claim 25 wherein said interlayer oxide layer comprises Bi₂O₃.

27. An integrated circuit as in claim 25 wherein said metal oxide is non-ferroelectric.

28. An integrated circuit as in claim 25 wherein said metal oxide is ferroelectric.

29. An integrated circuit including a non-ferroelectric, high dielectric constant insulator thin film comprising a metal oxide selected from the group consisting of materials having the chemical formula A₂Bi₂B₂O₁₀, wherein A represents A-site atoms selected from the group of metals consisting of Ba, Bi, Sr, Pb, Ca, K, Na and La;

and B represents B-site atoms selected from the group of metals consisting of Ti, Zr, Ta, Hf, Mo, W and Nb.

30. An integrated circuit as in claim 29 wherein said metal oxide is (Ba_xSr₁₋

x)₂Bi₂(Ta_yNb<sub>1−

y</sub>)₂O₁₀, wherein 0≦

x≦

1.0 and 0≦

y≦

1.0.

31. An integrated circuit as in claim 29 wherein said metal oxide is (Ba_xSr₁₋

x)₂Bi₂Ta₂O₁₀, wherein 0≦

x≦

1.0.

32. An integrated circuit as in claim 31 wherein 0≦

x≦

0.6.

33. An integrated circuit as in claim 31 wherein 0.4≦

x≦

0.5.

34. An integrated circuit as in claim 29 wherein said metal oxide has a voltage coefficient of capacitance, Vcc, not exceeding ±

1% over an applied voltage range of from zero volts to ±

5 volts.

35. An integrated circuit as in claim 29 wherein said metal oxide has a temperature coefficient of capacitance, Tcc, not exceeding 1000 ppm through the temperature range of 20°

C. to 140°

C.

36. An integrated circuit as in claim 29 wherein said metal oxide has a temperature coefficient of capacitance, Tcc, not exceeding 100 ppm through the temperature range of 20°

C. to 140°

C.