Vertical MOS transistor
First Claim
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1. A vertical MOS transistor comprising:
- a semiconductor substrate of a first conductivity type;
a first epitaxial growth layer of a second conductivity type formed on the semiconductor substrate;
a second epitaxial growth layer of the first conductivity type formed on the first epitaxial growth layer;
a trench formed through the first and second epitaxial growth layers so as to extend into the semiconductor substrate;
a gate oxide film formed on an upper surface of the second epitaxial growth layer and a side wall and bottom wall of the trench;
a gate filled in the trench so as to be surrounded by the gate oxide film on the side wall of the trench and having an upper surface coincident with an upper surface of the first epitaxial growth layer;
a drain layer of the first conductivity type formed in the upper surface of the second epitaxial growth layer in a region a desired distance away from the gate;
a gate electrode connected to the gate;
a drain electrode connected to the drain layer; and
a source electrode connected to the semiconductor substrate.
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Abstract
There are provided a vertical MOS transistor in which a high frequency characteristic is improved by reducing a feedback capacitance, and a method of manufacturing the same. When a gate voltage is applied to a gate electrode, a channel is formed in a p− epitaxial growth layer along a trench, and an electron current flows from an n+ drain layer to the p− epitaxial growth layer. In this case, an overlapping area between a gate and the drain layer through a gate oxide film is smaller than prior art, and the capacitance between the gate and the drain layer is smaller than the prior art. Thus, the feedback capacitance becomes small and the high frequency characteristic is improved. Further, since a portion of the gate oxide film at the bottom of the trench is thicker than the portion at the side wall, the distance between the gate and the n+ semiconductor substrate becomes larger than the prior art, and the capacitance formed between the gate and the n+ semiconductor substrate is smaller than the prior art. Thus, the high frequency characteristic is improved as compared with the prior art.
23 Citations
19 Claims
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1. A vertical MOS transistor comprising:
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a semiconductor substrate of a first conductivity type;
a first epitaxial growth layer of a second conductivity type formed on the semiconductor substrate;
a second epitaxial growth layer of the first conductivity type formed on the first epitaxial growth layer;
a trench formed through the first and second epitaxial growth layers so as to extend into the semiconductor substrate;
a gate oxide film formed on an upper surface of the second epitaxial growth layer and a side wall and bottom wall of the trench;
a gate filled in the trench so as to be surrounded by the gate oxide film on the side wall of the trench and having an upper surface coincident with an upper surface of the first epitaxial growth layer;
a drain layer of the first conductivity type formed in the upper surface of the second epitaxial growth layer in a region a desired distance away from the gate;
a gate electrode connected to the gate;
a drain electrode connected to the drain layer; and
a source electrode connected to the semiconductor substrate. - View Dependent Claims (2, 3, 5, 6, 7, 8, 9, 10, 13)
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4. A vertical MOS transistor comprising:
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a semiconductor substrate of a first conductivity type;
an epitaxial growth layer of a second conductivity type formed on the semiconductor substrate;
a trench formed through the epitaxial growth layer so as to extend into the semiconductor substrate;
a gate oxide film formed on an upper surface of the epitaxial growth layer and a side wall and a bottom wall of the trench;
a gate filled in the trench so as to be surrounded by the gate oxide film on the side wall of the trench and having an upper surface lower than an upper surface of the epitaxial layer;
a diffusion layer of the first conductivity type formed in the epitaxial growth layer surrounding the gate;
a drain layer of the first conductivity type formed in the diffusion layer; and
a body region of the second conductivity type formed in a desired region of the epitaxial growth layer. - View Dependent Claims (11, 12)
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14. A vertical MOS transistor comprising:
- a semiconductor substrate having a first conductivity type;
a first epitaxial layer having a second conductivity type formed on the semiconductor substrate;
a second epitaxial layer having the first conductivity type formed on the first epitaxial layer;
a trench extending through at least the first and second epitaxial layers;
a gate insulator formed in the trench;
a polysilicon gate disposed in the trench and having an upper surface coincident with an upper surface of the first epitaxial layer;
a drain region having the first conductivity type formed in the second epitaxial layer surrounding the trench;
a gate electrode connected to the polysilicon gate;
a drain electrode connected to the drain region; and
a source electrode connected to the semiconductor substrate. - View Dependent Claims (15, 16, 17, 18, 19)
- a semiconductor substrate having a first conductivity type;
Specification
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Current AssigneeAblic Inc. (MinebeaMitsumi Inc.)
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Original AssigneeSeiko Instruments Incorporated (Seiko Group)
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InventorsOsanai, Jun, Harada, Hirofumi
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Primary Examiner(s)WOJCIECHOWICZ, EDWARD JOSEPH
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Application NumberUS09/767,502Publication NumberTime in Patent Office693 DaysField of Search251/332, 251/333, 251/334US Class Current257/333CPC Class CodesH01L 29/42368 the thickness being non-uni...H01L 29/781 Inverted VDMOS transistors,...H01L 29/7813 with trench gate electrode,...
