SPST switch, SPDT switch, and communication apparatus using the SPDT switch

• US 6,496,684 B2
• Filed: 07/11/2001
• Issued: 12/17/2002
• Est. Priority Date: 10/07/1998
• Status: Expired due to Term

• Current Assignee: Murata Manufacturing Co Limited
• Original Assignee: Murata Manufacturing Co Limited
• Inventors: Tanaka, Hiroaki, Sasabata, Akihiro, Nakao, Motoyasu
• Primary Examiner(s): TO, DORIS HA
• Application Number:
  US09/903,467
• Publication Number:
  US 20010049265A1
• Time in Patent Office: 524 Days
• Field of Search: 455/73, 455/78-82, 455/83, 333/101, 333/103, 333/104, 333/262, 327/283, 327/278, 327/281, 327/290, 327/288, 327/268
• US Class Current: 455/78
• CPC Class Codes: H03K 17/687 the devices being field-effect transistors
• CPC Class Codes: H03K 17/693 Switching arrangements with several input- or output-terminals, e.g. multiplexers, distributors logic circuits H03K19/00; code converters H03M5/00, H03M7/00

Abstract

An SPST switch having a small transmission loss and a small power consumption is provided. The drain and the source of an FET are connected to each other in series through an induction element and a capacitor element, one terminal of the capacitor element is connected to a first terminal, the other terminal is connected to a second terminal, the gate of the FET is connected to a control terminal, the capacitance of the capacitor element is made equal to the OFF capacitance of the FET, and the inductance of the induction element is set to be such a value that the induction element resonates at a signal frequency with the capacitor element.

Claims

1. A single pole double throw (SPDT) switch, comprising:

a first terminal, a second terminal, and a control terminal;

a field effect transistor (FET) having a gate connected to the control terminal, a drain connected to the first terminal, and a source, the FET exhibiting an OFF capacitance from drain to source;

a capacitor element having a capacitance substantially equal to the OFF capacitance of the FET, the capacitor element having one end connected to the first terminal and another end connected to the second terminal;

an induction element having one end connected to the source of the FET and another end connected to the second terminal, an inductance of the induction element being set such that it resonates with the capacitor element at a signal frequency; and

a switching element having first and second signal terminals and a switching terminal, the first signal terminal being coupled to the third terminal, the second signal terminal being coupled to the first terminal and the switching terminal being coupled to the control terminal such that the switching element is turned on and off synchronously with the FET.

2. The single pole double throw (SPDT) switch of claim 1, wherein the switching element is an FET, the first and second signal terminals being either of a drain and source, and the switching terminal being a gate.

3. A communication apparatus, comprising:

a single pole double throw (SPDT) switch, including;

a first terminal, a second terminal, and a control terminal;

a field effect transistor (FET) having a gate connected to the control terminal, a drain connected to the first terminal, and a source, the FET exhibiting an OFF capacitance from drain to source;

a capacitor element having a capacitance substantially equal to the OFF capacitance of the FET, the capacitor element having one end connected to the first terminal and another end connected to the second terminal;

an induction element having one end connected to the source of the FET and another end connected to the second terminal, an inductance of the induction element being set such that it resonates with the capacitor element at a signal frequency; and

a switching element having first and second signal terminals and a switching terminal, the first signal terminal being coupled to the third terminal, the second signal terminal being coupled to the first terminal and the switching terminal being coupled to the control terminal such that the switching element is turned on and off synchronously with the FET;

an antenna coupled to the first terminal;

a receiving circuit coupled to the second terminal;

a transmitting circuit coupled to the third terminal; and

a control circuit coupled to the first and second control terminals and being operable to provide switching signals to the first and second FETs such that the transmitting and receiving circuits are alternatively coupled to the antenna through the SPDT switch.

4. The communications apparatus of claim 3, wherein the switching element is an FET, the first and second signal terminals being either of a drain and source, and the switching terminal being a gate.