Power consumption reduction in medical devices employing multiple supply voltages and clock frequency control

• US 6,496,729 B2
• Filed: 07/22/1999
• Issued: 12/17/2002
• Est. Priority Date: 10/28/1998
• Status: Expired due to Fees

• Current Assignee: Medtronic Incorporated (Medtronic Plc)
• Original Assignee: Medtronic Incorporated (Medtronic Plc)
• Inventors: Thompson, David L.
• Primary Examiner(s): EVANISKO, GEORGE ROBERT
• Application Number:
  US09/359,155
• Publication Number:
  US 20020173825A1
• Time in Patent Office: 1,244 Days
• Field of Search: 607/1, 607/2, 607/4, 607/5, 607/9, 607/16
• US Class Current: 607/2
• CPC Class Codes: A61N 1/3605 Implantable neurostimulators for stimulating central or peripheral nerve system
• CPC Class Codes: A61N 1/362 Heart stimulators heart defibrillators A61N1/39
• CPC Class Codes: A61N 1/372 Arrangements in connection with the implantation of stimulators
• CPC Class Codes: A61N 1/378 Electrical supply

Abstract

Power consumption in medical devices is reduced through the operation of circuits at clock speeds of lower levels to adequately complete desired functions during predetermined time periods (e.g., blanking interval, upper rate interval, etc.) just-in-time prior to subsequent required functional processes; by providing supply voltages tailored for various circuits of an integrated circuit; by operating two or more circuits of an integrated circuit at different clock frequencies; by changing the supply voltage level “on the fly” as required by specific circuit timing functions required for various circuitry based on clock frequencies used to control operation of such circuitry; and/or by tailoring back gate bias or adjusting back gate bias “on the fly” for circuits based on the supply voltage level applied to the circuits.

Claims

1. An implantable medical device of the type having an energy source and providing a therapy to a patient'"'"'s body and/or monitoring a physiologic condition of the body, comprising:

a clock source that draws energy from the energy source to develop a clock signal having a clock frequency defining a clock cycle between successive clock signals;

timing control means for sequentially defining a sequence of predetermined time periods during which a medical device function is performed including one of delivering a therapy or monitoring physiologic events representative of a physiologic condition and providing a physiologic signal, wherein each predetermined time period extends between a prior predetermined time period and a subsequent predetermined time period;

at least one circuit that performs a function related to the provision of a therapy or monitoring a physiologic condition during at least one of the defined predetermined time periods, the circuit requiring a predetermined number of clock signals to perform the function; and

means for operating the clock source during the predetermined time period to provide a clock signal at a clock frequency providing the predetermined number clock signals to operate the circuit over the predetermined time period;

such that substantially the entire predetermined time period is used to perform the function, wherein the function is completed just prior to the subsequent time period and the number of clock signals applied to the circuit is minimized to conserve energy drawn from the energy source.

2. The device of claim 1, wherein the at least one circuit comprises at least a first logic circuit for performing a first function and a second logic circuit for performing a second function, wherein the first logic circuit is operable to perform the first function employing a first predetermined number of clock signals during a first predetermined time period and the second logic circuit is operable to perform the second function employing a second predetermined number of clock signals during a second predetermined time period, and the means for operating the clock source provides a first clock signal at a first clock frequency providing the first predetermined number of clock signals to the first circuit and provides a second clock signal at a second clock frequency providing the second predetermined number of clock signals to the second circuit, whereby each of the first and second logic circuits is operated at a different clock frequency such that substantially the entire respective first and second predetermined time periods are used by the respective first and second logic circuits to perform the respective first and second functions.

3. The device of claim 2, wherein the first predetermined time period and the second predetermined time period are time periods based on monitored physiological events.

4. The device of claim 3, wherein at least one of the first and second time periods is a time period selected from the group consisting of time periods associated with cardiac events including blanking interval, upper rate interval, escape interval, refractory interval, and pulse generator/programmer handshake.

5. The device of claim 1, wherein the at least one circuit comprises a processing device, the processing device operable to perform a plurality of functions, each of the plurality of functions being performed during an associated predetermined time period prior to a subsequent time period in which another of the plurality of functions is performed, wherein the processing device is operable to perform each of two or more functions of the plurality of functions is at a predetermined clock frequency determined by the means for operating the clock source such that substantially the entire associated predetermine time period for each function is used to perform the function prior to the subsequent time period in which another of the plurality of functions is performed.

6. The device of claim 5, wherein the associated predetermined time periods are time periods based on monitored physiological events.

7. The device of claim 6, wherein at least one of the associated time periods are time periods selected from the group consisting of time periods associated with cardiac events including blanking interval, upper rate interval, escape interval, refractory interval, and pulse generator/programmer handshake.

8. The device of claim 1, further comprising:

a plurality of supply voltage sources derived from the energy source that provide a respective plurality of supply voltages; and

means for applying a supply voltage from a supply voltage source to the circuit as a function of the clock frequency provided to the at least one circuit to minimize energy drawn from the energy source.

9. The device of claim 8, wherein the at least one circuit comprises at least a first logic circuit for performing a first function and a second logic circuit for performing a second function, wherein each of the first and second logic circuits is operated at a clock frequency provided by the means for operating the clock source, and further wherein each of the logic circuits has a supply voltage applied thereto from one of the plurality of supply voltage sources correlated with the clock frequency.

10. The device of claim 8, wherein:

the at least one circuit comprises a processing device, the processing device operable to perform a plurality of functions, wherein each of at least two of the plurality of functions is performed at a predetermined clock frequency provided by the means for operating the clock source such that substantially the entire associated predetermined time period for each function is used to perform the function prior to the subsequent time period in which another of the plurality of functions is performed; and

a first supply voltage is applied to the processing device during performance of one of the at least two functions and a second supply voltage is applied to the processing device during performance of the other function, wherein the first and second supply voltages are applied based on the clock frequencies provided to the processing device.

11. The device of claim 1, wherein the at least one circuit is of a type selected from the group consisting of CMOS circuits, CML circuits, SOS circuits, SOI circuits, BICMOS circuits and NMOS circuits.

12. The device of claim 1, wherein the device is an hermetically sealed implantable medical device.

13. The device of claim 12, wherein the implantable medical device is selected from the group consisting of an implantable stimulator, an implantable nerve stimulator, an implantable pacemaker, an IPG, an implantable cardioverter, an implantable PCD, an implantable defibrillator, an implantable ICD and an implantable drug pump.