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Supporting multiple FPGA configuration modes using dedicated on-chip processor

  • US 6,496,971 B1
  • Filed: 02/07/2000
  • Issued: 12/17/2002
  • Est. Priority Date: 02/07/2000
  • Status: Expired due to Term
First Claim
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1. A method of configuring a programmable logic structure of a programmable integrated circuit, the programmable integrated circuit comprising the programmable logic structure, a plurality of terminals, a processor and a plurality of configuration programs, the method comprising:

  • (a) reading by the processor one of a plurality of configuration mode codes from the plurality of terminals, the configuration mode code indicating one of the plurality of configuration programs; and

    (b) executing on the processor said one of the plurality of configuration programs determined by the configuration mode code read by the processor, execution of said one of the plurality of configuration programs causing configuration data to be read onto the programmable integrated circuit and to configure the programmable logic structure.

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