Supporting multiple FPGA configuration modes using dedicated on-chip processor
First Claim
1. A method of configuring a programmable logic structure of a programmable integrated circuit, the programmable integrated circuit comprising the programmable logic structure, a plurality of terminals, a processor and a plurality of configuration programs, the method comprising:
- (a) reading by the processor one of a plurality of configuration mode codes from the plurality of terminals, the configuration mode code indicating one of the plurality of configuration programs; and
(b) executing on the processor said one of the plurality of configuration programs determined by the configuration mode code read by the processor, execution of said one of the plurality of configuration programs causing configuration data to be read onto the programmable integrated circuit and to configure the programmable logic structure.
1 Assignment
0 Petitions
Accused Products
Abstract
An FPGA has an on-chip processor that reads configuration data onto the FPGA and controls the loading of that configuration data into FPGA configuration memory cells. After FPGA power-up, the processor reads a configuration mode code from predetermined terminals of the FPGA. If the configuration mode code has a first value, then the processor executes a first configuration program so that configuration data is received onto the FPGA in accordance with a first configuration mode. If the configuration mode code has a second value, then the processor executes a second configuration program so that configuration data is received onto the FPGA in accordance with a second configuration mode. The configuration programs can be stored in metal-mask ROM on-chip so they can be changed without re-laying out the remainder of the FPGA. Providing multiple configuration programs allows the FPGA to support multiple configuration modes using the same processor hardware. One configuration mode code causes the processor to execute a loader program that in turn loads a configuration program onto the FPGA from a source external to the FPGA. Once the configuration program is loaded, the processor executes the configuration program thereby allowing the FPGA to support a custom configuration mode.
-
Citations
32 Claims
-
1. A method of configuring a programmable logic structure of a programmable integrated circuit, the programmable integrated circuit comprising the programmable logic structure, a plurality of terminals, a processor and a plurality of configuration programs, the method comprising:
-
(a) reading by the processor one of a plurality of configuration mode codes from the plurality of terminals, the configuration mode code indicating one of the plurality of configuration programs; and
(b) executing on the processor said one of the plurality of configuration programs determined by the configuration mode code read by the processor, execution of said one of the plurality of configuration programs causing configuration data to be read onto the programmable integrated circuit and to configure the programmable logic structure. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
-
-
12. A method of configuring a programmable integrated circuit, the programmable integrated circuit comprising a programmable logic structure, a processor, and a memory containing a first program and a second program, the method comprising:
-
receiving a configuration mode code onto the programmable integrated circuit;
if the configuration mode code has a first value then executing on the processor the first program and thereby reading first configuration data in a first format onto the programmable integrated circuit;
if the configuration mode code has the first value then configuring the programmable logic structure using the first configuration data;
if the configuration mode code has a second value then executing on the processor the second program and thereby reading second configuration data in a second format onto the programmable integrated circuit; and
if the configuration mode code has the second value then configuring the programmable logic structure using the second configuration data.
-
-
13. A programmable integrated circuit, comprising:
-
a programmable logic structure;
at least one code terminal;
a memory storing a first configuration program and a second configuration program; and
a processor, wherein the processor reads the at least one code terminal and determines, based on a configuration mode code on said code terminal, whether to execute the first configuration program or to execute the second configuration program, wherein execution of the first configuration program would cause first configuration data to be read onto the programmable integrated circuit and to configure the programmable logic structure, and wherein execution of the second configuration program would cause second configuration data to be read onto the programmable integrated circuit and to configure the programmable logic structure. - View Dependent Claims (14)
-
-
15. A programmable integrated circuit, comprising:
-
a programmable logic structure;
a plurality of terminals;
a memory storing a first configuration program and a second configuration program; and
means for reading a configuration mode code from the plurality of terminals, and for executing the first configuration program if the configuration mode code has a first value, and for executing the second configuration program if the configuration mode code has a second value, wherein if the first configuration program is executed then configuration data in a first format is received onto the programmable integrated circuit and is used to configure the programmable logic structure, and wherein if the second configuration program is executed then configuration data in a second format is received onto the programmable integrated circuit and is used to configure the programmable logic structure. - View Dependent Claims (16, 17, 18, 19)
-
-
20. A method of configuring a programmable logic structure of a programmable integrated circuit, the programmable logic structure having configuration memory cells, the programmable integrated circuit comprising the programmable logic structure, a processor, and a plurality of terminals, the method comprising:
-
(a) reading by the processor a configuration mode code from the plurality of terminals, the configuration mode code having a first value;
(b) executing on the processor a loader program if the configuration mode code has the first value, wherein execution of the loader program causes the processor to read a configuration program onto the programmable integrated circuit; and
(c) executing on the processor the configuration program such that the processor reads configuration data onto the programmable integrated circuit and loads the configuration data into the configuration memory cells of the programmable logic structure. - View Dependent Claims (21)
-
-
22. A programmable integrated circuit, comprising:
-
a programmable logic structure comprising a plurality of configuration memory cells;
a plurality of terminals;
a memory storing a loader program; and
a processor that reads a configuration mode code from the plurality of terminals and if the configuration mode code has a first value then the processor executes the loader program, wherein execution of the loader program causes the processor to read a configuration program onto the programmable integrated circuit and execute the configuration program, wherein execution of the configuration program causes configuration data to be read onto the programmable integrated circuit and to be loaded into the configuration memory cells of the programmable logic structure.
-
-
23. A programmable integrated circuit, comprising:
-
a programmable logic structure comprising a plurality of configuration memory cells;
a plurality of terminals;
a memory storing a loader program; and
means for reading a configuration mode code from the plurality of terminals and if the configuration mode code has a first value then the means executes the loader program, wherein execution of the loader program causes the means to read a configuration program onto the programmable integrated circuit and to execute the configuration program, wherein execution of the configuration program causes configuration data to be read onto the programmable integrated circuit and to be loaded into the plurality of configuration memory cells. - View Dependent Claims (24, 25, 26, 27)
-
-
28. A programmable integrated circuit comprising:
-
a programmable logic structure;
a programmable interconnect structure;
a plurality of terminals;
a processor that automatically reads a configuration mode code from the plurality of terminals after power-up of the programmable integrated circuit; and
a configuration structure for configuring the programmable logic structure and the programmable interconnect structure, the configuration structure being controlled by the processor.
-
-
29. A method of controlling configuration of a programmable integrated circuit having a programmable logic structure, a programmable interconnect structure, and a configuration structure, the method comprising the steps of:
-
configuring the configuration structure;
reading a configuration mode code onto the programmable integrated circuit using the configuration structure;
reading configuration data onto the programmable integrated circuit and using the configuration data to configure the programmable logic structure and the programmable interconnect structure; and
reconfiguring the configuration structure. - View Dependent Claims (30, 31)
-
-
32. A programmable integrated circuit, comprising:
-
a programmable logic structure having a plurality of configuration memory cells;
a plurality of terminals;
a processor that automatically reads a configuration mode code from a source external to the programmable integrated circuit; and
a serial-to-parallel converter connected to at least one of said plurality of terminals and to said processor, wherein if the configuration mode code has a predetermined value then said serial-to-parallel converter converts configuration data from serial format to parallel format, the processor reading said configuration data in parallel format from said serial-to-parallel converter and causing said configuration data to configure said programmable logic structure.
-
Specification