Radio frequency receiving circuit having a passive monopulse comparator

• US 6,498,582 B1
• Filed: 08/08/2000
• Issued: 12/24/2002
• Est. Priority Date: 06/19/1998
• Status: Expired due to Term

• Current Assignee: Raytheon Company (Rtx Corporation)
• Original Assignee: Raytheon Company (Rtx Corporation)
• Inventors: Sweeney, Anthony, Delcheccolo, Michael J., Licciardello, Joseph, Toth, John, Gingras, Ray, Hebeisen, Mark A., Forbes, Andrew B., La Fave, George
• Primary Examiner(s): Gregory, Bernarr E.
• Application Number:
  US09/633,298
• Time in Patent Office: 868 Days
• Field of Search: 342/149, 342/150, 342/151, 342/152, 342/153, 342/154, 342/175, 342/89, 342/165, 342/173, 342/174, 342/378-384, 326/99
• US Class Current: 342/149
• CPC Class Codes: G01S 13/44 Monopulse radar, i.e. simultaneous lobing
• CPC Class Codes: G01S 13/4409 HF sub-systems particularly adapted therefor, e.g. circuits for signal combination multi-lobing aerials or aerial systems H01Q25/00
• CPC Class Codes: G01S 7/032 Constructional details for solid-state radar subsystems
• CPC Class Codes: G01S 7/4021 of receivers
• CPC Class Codes: H01P 1/387 Strip line circulators
• CPC Class Codes: H01Q 25/02 providing sum and difference patterns H01Q25/04 takes precedence
• CPC Class Codes: H01Q 25/04 Multimode antennas corrugated horns H01Q13/0208
• CPC Class Codes: H01Q 3/267 Phased-array testing or checking devices
• CPC Class Codes: H03H 7/0115 comprising only inductors and capacitors H03H7/075, H03H7/09, H03H7/12, H03H7/13 take precedence

Abstract

A passive MMIC monopulse comparator includes a plurality of lumped element hybrids having pi and T filter structures. In one embodiment, a first hybrid receives first and second downcoverted signals and provides a first output signal to a third hybrid and second output signal to a fourth hybrid. A second hybrid receives third and fourth downconverted signals and provides respective third and fourth output signals to the third and fourth hybrids. The third hybrid provides sum and elevation channel signals and the fourth hybrid provides azimuth and G channel signals.

Claims

1. A passive MMIC monopulse comparator circuit comprising:

a first lumped element hybrid circuit; and

a second lumped element hybrid circuit coupled to the first lumped element hybrid circuit, wherein the first lumped element hybrid circuit and the second lumped element hybrid circuit form a part of the passive MMIC monopulse comparator circuit.

2. The circuit according to claim 1, wherein each of the first and the second humped element hybrid circuits includes a T circuit coupled to a pi circuit.

3. The circuit according to claim 2 wherein the T circuit is a series capacitor, shunt inductor, and series capacitor type T circuit.

4. The circuit according to claim 2, wherein the pi circuit is a shunt capacitor, series inductor, shunt capacitor type pi circuit.

5. The circuit according to claim 1, wherein at least one of the first and the second lumped element hybrid circuits includes a first series circuit path including a first capacitor, a first inductor and a second capacitor, a second series circuit path including a third capacitor, a second inductor and a fourth capacitor, a third series circuit path including fifth and sixth capacitors, a fourth series circuit path including the first and second inductors, a third inductor and the fifth and sixth capacitors, and a fourth inductor coupled between the fifth and sixth capacitors.

6. The circuit according to claim 5, wherein the first and third capacitors have a capacitance value that is about double a capacitance value of the second, four, fifth and sixth capacitors.

7. A passive MMIC monopulse comparator, comprising:

a first lumped element hybrid circuit receiving first and second input signals and providing first and second output signals;

a second lumped element hybrid circuit receiving third and fourth input signals and providing third and fourth output signals;

a third lumped element hybrid circuit receiving the first output signal from the first lumped element hybrid circuit and the third output signal from the second lumped element hybrid circuit and providing a sum channel output signal and an elevation channel output signal; and

a fourth lumped element hybrid circuit receiving the second output signal from the first lumped element hybrid circuit and the fourth output signal from the second lumped element hybrid circuit and providing an azimuth channel output signal and a Q channel output signal.

8. The monopulse comparator according to claim 7, wherein the first lumped element hybrid circuit includes a plurality of pi-type circuits and a T type circuit.

9. The monopulse comparator according to claim 7, wherein the first lumped element hybrid circuit includes a first series circuit path including a first capacitor, a first inductor and a second capacitor, a second series circuit path including a third capacitor, a second inductor and a fourth capacitor, a third series circuit path including fifth and sixth capacitors, a fourth series circuit path including the first and second inductors, a third inductor and the fifth and sixth capacitors, and a fourth inductor coupled between the fifth and sixth capacitors.

10. The monopulse comparator circuit according to claim 9, wherein the fifth and sixth capacitors and the fourth inductor comprise a T type circuit.

11. The monopulse comparator circuit according to claim 9, wherein the first capacitor, the first inductor, and the second capacitor comprise a pi type circuit.

12. A radar system, comprising:

an antenna having a plurality of antenna ports, the antenna responsive to signals having a frequency in a predetermined frequency range;

a plurality of protection circuits each of the protection circuits having a first port coupled directly to a respective one of the plurality of antenna ports and a second port, each protection circuit responsive to a first control signal which allows signals to propagate in a first direction between the first port of the protection circuit and the second port of the protection circuit and each protection circuit also responsive to a second control signal which allows signals to propagate in a second opposite direction between the first port of the protection circuit and the second port of the protection circuit;

a receiver circuit for downconverting signals from the second ports of the protection circuits to IF signals, the receiving circuit including a passive MMIC monopulse comparator.

13. The system according to claim 12, wherein the receiving circuit further includes:

a plurality of mixers, each of the plurality of mixers having a first port coupled to a respective one of the plurality of protection circuits, a second port for receiving a bias signal, and a third port for providing a frequency shifted signal; and

a plurality of amplifiers, each of the plurality of amplifiers having a first port coupled to the third port of a respective one of the plurality of mixers and a second port coupled to the monopulse comparator.