Variable rate modulator
First Claim
1. A signal processing system, comprising:
- a clock providing a first clock signal at a first clock frequency;
a numerically controlled oscillator responsive to a frequency control signal and the first clock signal for providing an output clock signal at a fixed second clock frequency, and a phase offset signal representing an offset in phase between the first clock signal and the second clock signal, and an interpolator that offsets a pair of variable frequency input signals in accordance with the phase offset signal to provide an interpolated signal at a fixed output sampling frequency.
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Accused Products
Abstract
Digital data signals at a variable input frequency are converted by a numerically controlled oscillator and an interpolator to a signal at a fixed output sampling frequency. The conversion of the variable input frequency to the fixed output sampling frequency may be by a factor other than an integer. The interpolated digital data signals at the fixed output sampling frequency are then modulated into a pair of trigonometric signals at a programmable carrier frequency, one signal having a cosine function and the other signal having a sine function. The modulated signals at the fixed output sampling frequency are then combined to create a modulated signal at a carrier frequency determined by the frequency of the sine and cosine signals. The modulated signal is sampled at the fixed output sampling frequency and converted to a corresponding analog signal using a digital-to-analog converter.
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Citations
24 Claims
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1. A signal processing system, comprising:
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a clock providing a first clock signal at a first clock frequency;
a numerically controlled oscillator responsive to a frequency control signal and the first clock signal for providing an output clock signal at a fixed second clock frequency, and a phase offset signal representing an offset in phase between the first clock signal and the second clock signal, and an interpolator that offsets a pair of variable frequency input signals in accordance with the phase offset signal to provide an interpolated signal at a fixed output sampling frequency. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A signal processing system comprising:
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a symbol mapper for converting binary data bits to a pair of data signals at a variable frequency having an amplitude and phase that represents the binary data bits;
a clock providing a first clock signal at a first clock frequency;
a numerically controlled oscillator responsive to a control signal and the first clock signal for providing a second clock signal at a fixed second clock frequency, and a phase offset signal representing an offset in phase between the first clock signal and the second clock signal;
an interpolator that offsets a pair of variable frequency input signals in accordance with the phase offset signal to provide interpolated signals at a fixed sampling frequency;
a modulator that modulates the interpolated signals onto trigonometric signals;
an operator that combines the modulated signals; and
a digital to analog converter that converts the combined modulated signal to an analog signal.
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9. A method of converting a variable frequency input signal to a fixed frequency output signal comprising:
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generating a first clock signal at a first clock frequency;
receiving a frequency control signal that corresponds to a second frequency;
generating a second clock signal at the second frequency as a function of said frequency control signal;
generating a phase offset signal representing an offset in phase between the first clock signal and the second clock signal; and
offsetting a pair of variable frequency data signals in accordance with said phase offset signal to generate an output signal at a fixed sampling frequency. - View Dependent Claims (10)
modulating the interpolated signal onto trigonometric signals; and
converting the modulated signal to an analog signal.
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11. A signal processing system, comprising:
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a numerically controlled oscillator responsive to a frequency control signal and a first clock signal at a first clock frequency;
for providing a second clock signal at a fixed second clock frequency, and, for providing a phase offset signal representing an offset in phase between the first clock signal and the second clock signal, andan interpolator that offsets a pair of variable frequency input signals in accordance with the phase offset signal to provide an interpolated signal at a fixed sampling frequency.
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12. A signal processing system comprising:
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a symbol mapper for converting binary data bits to a pair of data signals at a variable frequency having an amplitude and phase that represents the binary data bits;
a numerically controlled oscillator responsive to a control signal and a first clock signal at a first clock frequency for providing a second clock signal at a fixed second clock frequency, and a phase offset signal representing an offset in phase between the first clock signal and the second clock signal;
an interpolator that offsets a pair of variable frequency input signals in accordance with the phase offset signal to provide interpolated signals at a fixed sampling frequency;
a modulator that modulates the interpolated signals onto trigonometric signals;
an operator that combines the modulated signals; and
a digital to analog converter that converts the combined modulated signal to an analog signal.
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13. A method of converting a variable frequency input signal to an output signal having a fixed output frequency, comprising:
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generating a clock signal at a clock frequency equal to baud rate of said input signal as a function of a received frequency control signal;
generating a phase offset signal representing an offset in phase between a recipient clock signal and the clock signal; and
offsetting a pair of variable frequency data signals in accordance with said phase offset signal to generate an output signal at a fixed sampling frequency.
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14. A digital resampler comprising:
an interpolator responsive to a symbol clock and a phase offset signal representing an offset in phase between a sample clock at a fixed sampling frequency and said symbol clock, wherein said interpolator offsets a pair of variable frequency input signals in accordance with said symbol clock and phase offset signal to provide an interpolated signal at said fixed sampling frequency. - View Dependent Claims (15)
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16. A signal processing system, comprising:
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a clock providing a first clock signal at a first clock frequency;
a numerically controlled oscillator responsive to a frequency control signal and the first clock signal for providing a second clock signal at a fixed second clock signal, and a phase offset signal representing an offset in phase between the first clock signal and the second clock signal, and a linear interpolator responsive to the phase offset signal for converting a variable frequency input signal to an interpolated signal at a fixed sampling frequency. - View Dependent Claims (17, 18)
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19. A signal processing system, comprising:
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a clock providing a sample clock signal at a sample clock frequency;
a numerically controlled oscillator responsive to a frequency control signal and the sample clock signal for providing an output clock signal at a fixed output sampling rate, and a phase offset signal representing an offset in phase between the sample clock signal and the output clock signal, and a linear interpolator that provides offsets between a variable frequency input signal at a first time and a second time in accordance with the phase offset signal to convert provides offsets between a pair of variable frequency input signals in accordance with the phase offset signal the variable frequency input signal to an interpolated signal at a fixed sampling frequency. - View Dependent Claims (20, 21, 22, 23, 24)
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Specification