Method of assigning integrated circuit I/O signals in an integrated circuit package
First Claim
Patent Images
1. A method comprising:
- selecting I/O circuits of a logic design; and
assigning the I/O circuits to I/O pads of a package of the logic design in accordance with a desired crosstalk and time-of-flight constraints for signals corresponding to said I/O circuits associated with the I/O pads.
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Abstract
A method for improving the crosstalk and time-of-flight performance for signals in an integrated circuit with respect to the package-related wiring. I/O pads in the package-related wiring of a logic design meeting specified crosstalk and time-of-flight constraints are identified using a software tool. The tool produces a graphical display in which the identified I/O pads are highlighted. The tool enables a user to graphically manipulate the display to assign, i.e., establish an electrical connection, between I/O circuits corresponding to the signals and the highlighted I/O pads.
87 Citations
20 Claims
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1. A method comprising:
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selecting I/O circuits of a logic design; and
assigning the I/O circuits to I/O pads of a package of the logic design in accordance with a desired crosstalk and time-of-flight constraints for signals corresponding to said I/O circuits associated with the I/O pads. - View Dependent Claims (2, 3)
prioritizing the I/O circuits according to their time-of-flight constraints; and
assigning the I/O circuits to I/O pads of the package of the logic design according to their prioritization.
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3. The method of claim 2, wherein said step of assigning includes graphically manipulating I/O circuits corresponding to said signals to position them adjacent to said I/O pads meeting said constraints.
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4. A method comprising:
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highlighting I/O pads in a graphical display of a logic design layout in accordance with specified crosstalk and time-of-flight constraints; and
assigning I/O circuits to said highlighted I/O pads, said I/O circuits carrying signals to and from said logic design. - View Dependent Claims (5, 6, 7)
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8. A computer-usable medium storing computer-executable instructions which when executed implement a process comprising:
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applying specified crosstalk and time-of-flight constraints for signals in a logic design to a database including crosstalk and time-of-flight information for package-related wiring;
identifying I/O pads in said package-related wiring meeting said constraints; and
producing a graphical display of said logic design in which said identified I/O pads are highlighted. - View Dependent Claims (9, 10)
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11. A computer system comprising:
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a memory containing computer-executable instructions;
a processor coupled to said memory for executing said instructions; and
display means coupled to said processor for generating a graphical display in accordance with said instructions;
wherein;
said graphical display includes an image of a logic design having I/O pads highlighted in accordance with user-specified crosstalk and time-of-flight constraints. - View Dependent Claims (12, 13, 14)
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15. A method comprising:
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highlighting I/O pads, distributed in a die logic area, in a graphical display of a logic design layout in accordance with specified crosstalk and time-of-flight constraints; and
assigning I/O circuits to said highlighted I/O pads, said I/O circuits signals to and from said logic design layout.
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16. A method comprising:
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highlighting I/O pads, distributed in a die logic area, in a graphical display of a logic design layout in accordance with specified crosstalk and time-of-flight constraints; and
assigning I/O circuits to a range of said highlighted I/O pads, said I/O circuits carrying signals to and from said logic design layout.
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17. An apparatus comprising:
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means for highlighting I/O pads, distributed in a die logic area, in a graphical display of a logic design layout in accordance with specified crosstalk and time-of-flight constraints; and
means for assigning I/O circuits to said highlighted I/O pads, said I/O circuits carrying signals to and from said logic design layout.
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18. An apparatus comprising:
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means for highlighting I/O pads, distributed in a die logic area, in a graphical display of a logic design layout in accordance with specified crosstalk and time-of-flight constraints; and
means for assigning I/O circuits to a range of said highlighted I/O pads, said I/O circuits carrying signals to and from said logic design layout.
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19. A computer program product comprising;
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a computer usable medium having computer readable program code means embodied in the medium, the computer readable program means including;
means for highlighting I/O pads, distributed in a die logic area, in a graphical display of a logic design layout in accordance with specified crosstalk and time-of-flight constraints; and
means for assigning I/O circuits to said highlighted I/O pads, said I/O circuits carrying signals to and from said logic design layout.
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20. A computer program product comprising:
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a computer usable medium having computer readable program code means embodied in the medium, the computer readable program means including;
means for highlighting I/O pads, distributed in a die logic area, in a graphical display of a logic design layout in accordance with specified crosstalk and time-of-flight constraints; and
means for assigning I/O circuits to arrange of said highlighted I/O pads, said I/O circuits carrying signals to and from said logic design layout.
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Specification