Semiconductor device
First Claim
1. A semiconductor device including at least one TFT formed over a substrate, said TFT including a semiconductor layer, a gate insulating film formed in contact with the semiconductor layer and a gate electrode formed in contact with the gate insulating film,wherein said gate electrode includes a first conductive layer which is formed in contact with said gate insulating film, a second conductive layer which is formed on and inside a periphery of an upper surface of said first conductive layer, and a third conductive layer which is formed in contact with said first conductive layer and with top and side surfaces of said second conductive layer, wherein said second conductive layer comprises a different material from that of said first and third conductive layers;
- wherein said semiconductor layer includes a channel forming region, a first impurity region of one conductivity type, and a second impurity region of said one conductivity type which is formed between said channel forming region and said first impurity region; and
wherein a part of said second impurity region of said one conductivity type lies under said first conductive layer of said gate electrode.
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Accused Products
Abstract
The gate electrode of a crystalline TFT is constructed as a clad structure which consists of a first gate electrode, a second gate electrode and a third gate electrode, thereby to enhance the thermal resistance of the gate electrode. Besides, an n-channel TFT is provided with a low-concentration impurity region which adjoins a channel forming region, and which includes a subregion overlapped by the gate electrode and a subregion not overlapped by the gate electrode, thereby to mitigate a high electric field near the drain of the TFT and to simultaneously prevent the OFF current of the TFT from increasing.
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Citations
27 Claims
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1. A semiconductor device including at least one TFT formed over a substrate, said TFT including a semiconductor layer, a gate insulating film formed in contact with the semiconductor layer and a gate electrode formed in contact with the gate insulating film,
wherein said gate electrode includes a first conductive layer which is formed in contact with said gate insulating film, a second conductive layer which is formed on and inside a periphery of an upper surface of said first conductive layer, and a third conductive layer which is formed in contact with said first conductive layer and with top and side surfaces of said second conductive layer, wherein said second conductive layer comprises a different material from that of said first and third conductive layers; -
wherein said semiconductor layer includes a channel forming region, a first impurity region of one conductivity type, and a second impurity region of said one conductivity type which is formed between said channel forming region and said first impurity region; and
wherein a part of said second impurity region of said one conductivity type lies under said first conductive layer of said gate electrode. - View Dependent Claims (2, 3, 8, 9)
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4. A semiconductor device wherein a pixel portion has at least one pixel TFT,
wherein a gate electrode of said pixel TFT includes a first conductive layer which is formed in contact with a gate insulating film, a second conductive layer which is formed on said first conductive layer and inside a periphery of an upper surface of said first layer, and a third conductive layer which is formed in contact with said first conductive layer and with top and side surfaces of said second conductive layer wherein said second conductive layer comprises a different material from that of said first and third conductive layers; -
wherein a semiconductor layer of said pixel TFT includes a channel forming region, a first impurity region of one conductivity type, and a second impurity region of said one conductivity type which is formed between said channel forming region and said first impurity region; and
wherein a part of said second impurity region of said one conductivity type lies under said first layer of said gate electrode. - View Dependent Claims (7)
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5. A semiconductor device including at least one CMOS circuit which is constituted by an n-channel TFT and a p-channel TFT, wherein
a gate electrode of said n-channel TFT includes a first conductive layer which is formed in contact with a gate insulating film, a second conductive layer which is formed on said first conductive layer and inside a periphery of an upper surface of said first conductive layer, and a third conductive layer which is formed in contact with said first conductive layer and said second conductive layer wherein said second conductive layer comprises a different material from that of said first and third conductive layers; -
a semiconductor layer of said n-channel TFT includes a channel forming region, a first impurity region of one conductivity type, and a second impurity region of said one conductivity type which is formed between said channel forming region and said first impurity region;
a part of said second impurity region of said one conductivity type lies under said first conductive layer of said gate electrode;
a semiconductor layer of said p-channel TFT includes a channel forming region, and a third impurity region which lies in contact with said channel forming region; and
said third impurity region includes a subregion which lies in contact with said channel forming region and which contains an impurity element of a conductivity type opposite to said one conductivity type, and a subregion which contains an impurity element of said one conductivity type and an impurity element of the opposite conductivity type.
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6. A semiconductor device including a pixel portion which is constituted by at least one pixel TFT, and a CMOS circuit which is constituted by an n-channel TFT and a p-channel TFT, wherein:
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a gate electrode of each of said pixel TFT and said n-channel TFT includes a first conductive layer which is formed in contact with a gate insulating film, a second conductive layer which is formed on said first conductive layer and inside a periphery of an upper surface of said first conductive layer, and a third conductive layer which is formed in contact with said first conductive layer and said second conductive layer wherein said second conductive layer comprises a different material from that of said first and third conductive layers;
a semiconductor layer of each of said pixel TFT and said n-channel TFT includes a channel forming region, a first impurity region of one conductivity type, and a second impurity region of said one conductivity type which is formed between said channel forming region and said first impurity region;
a part of said second impurity region of said one conductivity type lies under said first conductive layer of said gate electrode;
a semiconductor layer of said p-channel TFT includes a channel forming region, and a third impurity region which lies in contact with said channel forming region; and
said third impurity region includes a subregion which lies in contact with said channel forming region and which contains an impurity element of a conductivity type opposite to said one conductivity type, and a subregion which contains an impurity element of said one conductivity type and an impurity element of the opposite conductivity type.
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10. A semiconductor device comprising:
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at least one thin film transistor formed over a substrate, said thin film transistor comprising;
a semiconductor layer comprising a channel forming region, a first impurity region of one conductivity type and a second impurity region between the channel forming region and the first impurity region;
an insulating film over the semiconductor layer;
a gate electrode formed over the semiconductor layer with the insulating film interposed therebetween, said gate electrode comprising a first conductive layer which contacts said insulating film, a second conductive layer formed on said first conductive layer, and a third conductive layer formed on said second conductive layer, wherein said first conductive layer extends beyond side edges of the second conductive layer, and said third conductive layer extends beyond the side edges of the second conductive layer and at least one side edge of the third conductive layer is coextensive with a side edge of the first conductive layer, wherein said second conductive layer comprises a different material from that of said first and third conductive layers;
wherein a part of said second impurity region is located below the first conductive layer of the gate electrode. - View Dependent Claims (11, 12, 13, 14, 15, 16, 17, 18)
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19. A semiconductor device comprising:
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at least one thin film transistor formed over a substrate, said thin film transistor comprising;
a semiconductor layer comprising a channel forming region, a first impurity region of one conductivity type and a second impurity region between the channel forming region and the first impurity region;
an insulating film formed over the semiconductor layer;
a gate electrode adjacent to the channel forming region with the insulating film interposed therebetween, said gate electrode comprising a first conductive layer formed on said insulating film, a second conductive layer formed on said first conductive layer, and a third conductive layer formed on and in contact with said second conductive layer, wherein said first conductive layer extends beyond side edges of the second conductive layer, and said third conductive layer extends beyond the side edges of the second conductive layer so that said third conductive layer contacts upper surfaces of the first conductive layer which are not covered by the second conductive layer, wherein the second conductive layer comprises a different material from that of said first and third conductive layers;
wherein a part of said second impurity region is located below the first conductive layer of the gate electrode. - View Dependent Claims (20, 21, 22, 23, 24, 25, 26, 27)
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Specification