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High-voltage transistor with buried conduction layer

  • US 6,501,130 B2
  • Filed: 06/20/2002
  • Issued: 12/31/2002
  • Est. Priority Date: 01/24/2001
  • Status: Expired due to Term
First Claim
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1. A complementary device that includes first and second high-voltage field-effect transistors (HVFETs) fabricated on a substrate of a first conductivity type, comprising:

  • first and second well regions of a second conductivity type, opposite to the first conductivity type, disposed in the substrate, the first well region being spaced-apart from the second well region, the first and second well regions being associated with the first and second HVFETs, respectively;

    the first HVFET further comprising;

    a first source diffusion region of the first conductivity type disposed in the first well region;

    a first drain diffusion region of the first conductivity type disposed in the first well region spaced-apart from the first source diffusion region, a first channel region being defined in the first well region between the first source diffusion region and the first drain diffusion region;

    a second drain diffusion region of the first conductivity type disposed in the first well region spaced-apart from the first drain diffusion region;

    a first buried layer region of the first conductivity type disposed within the first well region, the first buried layer region being connected to both the first and second drain diffusion regions;

    a first insulated gate formed over the first channel region;

    the second HVFET further comprising;

    a second source diffusion region of the second conductivity type disposed in the substrate and spaced-apart from the second well region, a second channel region being defined between the second well region and the second source diffusion region;

    a third drain diffusion region of the second conductivity type disposed in the second well region;

    a second buried layer region of the first conductivity type disposed within the second well region;

    a second insulated gate formed over the second channel region.

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