Multi-processor switch and main processor switching method

• US 6,502,206 B1
• Filed: 06/07/1999
• Issued: 12/31/2002
• Est. Priority Date: 12/15/1998
• Status: Expired due to Fees

• Current Assignee: Fujitsu Limited
• Original Assignee: Fujitsu Limited
• Inventors: Takeda, Kazumasa, Kosuge, Yukio
• Primary Examiner(s): Badesman, Scott
• Application Number:
  US09/326,621
• Time in Patent Office: 1,303 Days
• Field of Search: 714/13, 714/11, 714/10, 714/12, 709/105
• US Class Current: 714/13
• CPC Class Codes: G06F 11/2028 eliminating a faulty processor or activating a spare
• CPC Class Codes: G06F 11/2035 without idle spare hardware
• CPC Class Codes: G06F 11/2051 in regular structures

Abstract

A multi-processor switch includes a main processor, a plurality of co-processors to perform a calling process under the control of the main processor, a detection unit to detect a failure at the main processor, and a determination unit to determine which replacement processor will perform the main processor functions from among the co-processors, based on the operating state of each co-processor when the failure at the main processor is detected by the detection unit. The operating state of each of the co-processor is, for example, the load state imposed on the co-processor or the number of times its operation has been resumed. By selecting a co-processor that has a small load or which has been resumed less frequently, an appropriate, more stable replacement processor can be determined.

Claims

1. A multi-processor switch comprising:

a main processor;

a plurality of co-processors for performing a calling process under the control of the main processor;

a detection unit for detecting a failure at the main processor;

a determination unit for determining a replacement processor for performing the main processor functions from among the co-processors based on the operating state of each co-processor when the failure at the main processor is detected by the detection unit; and

a switching unit for switching the co-processor determined by the determination unit as the replacement processor to a new main processor,

wherein the operating state of each co-processor is resumption occurrence count of each co-processor.

2. A multi-processor switch comprising:

a main processor;

a plurality of co-processors for performing a calling process under the control of the main processor;

a detection unit for detecting a failure at the main processor;

a determination unit for determining a replacement processor for performing the main processor functions from among the co-processors based on the operating state of each co-processor when the failure at the main processor is detected by the detection unit; and

a switching unit for switching the co-processor determined by the determination unit as the replacement processor to a new main processor,

wherein the operating state of each co-processor is load state and resumption occurrence count for each co-processor.

3. A multi-processor switch comprising:

a main processor;

a plurality of co-processors for performing a calling process under the control of the main processor;

a detection unit for detecting a failure at the main processor;

a determination unit for determining a replacement processor for performing the main processor functions from among the co-processors based on the operating state of each co-processor when the failure at the main processor is detected by the detection unit; and

a switching unit for switching the co-processor determined by the determination unit as the replacement processor to a new main processor,

wherein the new main processor performs both co-processor functions and main processor functions by shifting from a double operating state for the co-processor functions to a separate operating state,

wherein the new main processor obtains data concerning the main processor functions from a storage device at the main processor by basic boot-up of the main processor to perform the main processor functions, and

wherein, when the main processor has recovered from a failure, the new main processor transfers the data concerning the co-processor function to the main processor;

the main processor begins to perform the co-processor functions in accordance with the transferred data; and

the new main processor returns from the separate operating state to the double operating state to perform the main processor functions.

4. A multi-processor switch comprising:

a main processor;

a plurality of co-processors for performing a calling process under the control of the main processor;

a detection unit for detecting a failure at the main processor;

a determination unit for determining a replacement processor for performing the main processor functions from among the co-processors based on the operating state of each co-processor when the failure at the main processor is detected by the detection unit;

a switching unit for switching the co-processor determined by the determination unit as the replacement processor to a new main processor, and

a memory for storing data concerning the main processor functions, wherein the new main processor obtains the data concerning the main processor functions from the memory to perform the main processor functions,

wherein the new main processor performs both co-processor functions and main processor functions by shifting from a double operating state for the co-processor functions to a separate operating state, and

wherein, when the main processor has recovered from a failure, the new main processor transfers the data concerning the co-processor function to the main processor;

the main processor begins to perform the co-processor functions in accordance with the transferred data; and

the new main processor returns from the separate operating state to the double operating state to perform the main processor functions.

5. A main processor switching method for a multi-processor switch including a main processor and a plurality of co-processors for performing calling processes under the control of the main processor, comprising:

detecting a failure at a main processor;

determining a replacement processor for performing the main processor functions from among the co-processors based on the operating state of the co-processors;

switching the co-processor determined as the replacement processor to a new main processor; and

performing the main processor functions by the new main processor,

wherein the new main processor performs both co-processor functions and main processor functions by shifting from a double operating state for the co-processor functions to a separate operating state,

wherein the new main processor obtains the data concerning the main processor functions to perform the main processor functions, and

wherein, when the main processor has recovered from a failure, the new main processor transfers the data concerning the co-processor function to the main processor;

the main processor begins to perform the co-processor functions in accordance with the transferred data; and

the new main processor returns from the separate operating state to the double operating state to perform the main processor functions.

6. A multi-processor switch comprising:

a main processor;

a plurality of co-processors for performing a calling process under the control of the main processor, wherein the operating state of each co-processor is resumption occurrence count of each co-processor;

a detection unit for detecting a failure at the main processor; and

a determination unit for determining a replacement processor for performing the main processor functions from among the co-processors based on the operating state of each co-processor when the failure at the main processor is detected by the detection unit.

7. A multi-processor switch comprising:

a main processor;

a plurality of co-processors for performing a calling process under the control of the main processor, wherein the operating state of each co-processor is load state and resumption occurrence count for each co-processor;

a detection unit for detecting a failure at the main processor; and

a determination unit for determining a replacement processor for performing the main processor functions from among the co-processors based on the operating state of each co-processor when the failure at the main processor is detected by the detection unit.

8. A multi-processor switch comprising:

a main processor;

a plurality of co-processors for performing a calling process under the control of the main processor;

a detection unit for detecting a failure at the main processor; and

a determination unit for determining a replacement processor for performing the main processor functions from among the co-processors based on the operating state of each co-processor when the failure at the main processor is detected by the detection unit, wherein the replacement processor performs both co-processor functions and main processor functions by shifting from a double operating state for the co-processor functions to a separate operating state, wherein the replacement processor obtains data concerning the main processor functions from a storage device at the main processor by basic boot-up of the main processor to perform the main processor functions, and wherein, when the main processor has recovered from a failure, the replacement processor transfers the data concerning the co-processor function to the main processor;

the main processor begins to perform the co-processor functions in accordance with the transferred data; and

the replacement processor returns from the separate operating state to the double operating state to perform the main processor functions.

9. A multi-processor switch comprising:

a main processor;

a plurality of co-processors for performing a calling process under the control of the main processor;

a detection unit for detecting a failure at the main processor;

a determination unit for determining a replacement processor for performing the main processor functions from among the co-processors based on the operating state of each co-processor when the failure at the main processor is detected by the detection unit, wherein the replacement processor performs both co-processor functions and main processor functions by shifting from a double operating state for the co-processor functions to a separate operating state, and wherein, when the main processor has recovered from a failure, the replacement processor transfers the data concerning the co-processor function to the main processor;

the main processor begins to perform the co-processor functions in accordance with the transferred data; and

the replacement processor returns from the separate operating state to the double operating state to perform the main processor functions; and

a memory for storing data concerning the main processor functions, wherein the replacement processor obtains the data concerning the main processor functions from the memory to perform the main processor functions.

10. A main processor switching method for a multiprocessor switch including a main processor and a plurality of co-processors for performing calling processes under the control of the main processor, comprising:

detecting a failure at a main processor;

determining a replacement processor for performing the main processor functions from among the co-processors based on the operating state of the co-processors; and

performing the main processor functions by the replacement processor, wherein the replacement processor performs both co-processor functions and main processor functions by shifting from a double operating state for the co-processor functions to a separate operating state, wherein the replacement processor obtains the data concerning the main processor functions to perform the main processor functions, and wherein, when the main processor has recovered from a failure, the replacement processor transfers the data concerning the co-processor function to the main processor;

the main processor begins to perform the co-processor functions in accordance with the transferred data; and

the replacement processor returns from the separate operating state to the double operating state to perform the main processor functions.