Interconnect-embedded metal-insulator-metal capacitor

• US 6,504,202 B1
• Filed: 02/02/2000
• Issued: 01/07/2003
• Est. Priority Date: 02/02/2000
• Status: Expired due to Term

• Current Assignee: Bell Semiconductor, LLC (Hilco Inc. (d/b/a Hilco Global))
• Original Assignee: LSI Logic Corporation (Broadcom, Inc.)
• Inventors: Fuchs, Kenneth, Allman, Derryl D. J.
• Primary Examiner(s): Lee, Eddie
• Assistant Examiner(s): Fenty, Jesse A.
• Application Number:
  US09/496,971
• Time in Patent Office: 1,070 Days
• Field of Search: 257/306, 257/307, 257/308, 257/303, 257/304, 257/311, 257/758
• US Class Current: 257/303
• CPC Class Codes: H01L 21/768 Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
• CPC Class Codes: H01L 28/40 Capacitors
• CPC Class Codes: H01L 28/75 comprising two or more layers, e.g. comprising a barrier layer and a metal layer

Abstract

A metal-insulator-metal capacitor is embedded in an interconnect layer of an integrated circuit (IC). The interconnect layer has a cavity, and the capacitor is formed in the cavity with one of the plates of the capacitor integral with a conductive layer of the interconnect layer, so the capacitor plate electrically communicates with the interconnect layer. The interconnect layer has multiple conductive layers, including a layer, such as aluminum, that is subject to deformation at certain temperatures during fabrication of the IC, and the cavity extends through this layer. A remaining conductive layer of the interconnect layer defines one of the capacitor plates, and a dielectric layer and another capacitor plate are formed thereon within the cavity. Via interconnects of about the same length electrically connect to the top plate and through the interconnect layer to the bottom plate.

Claims

1. An integrated circuit (IC) comprising a substrate, a generally horizontally-extending interconnect layer, the interconnect layer having a vertical thickness extending between an upper surface and a lower surface of the interconnect layer, first and second layers of intermetal dielectric insulating material (IMD) contacting opposite sides of the interconnect layer, and an improvement comprising;

a cavity within the interconnect layer and located vertically between the upper and lower surfaces of the interconnect layer and horizontally between edges of the interconnect layer which define the cavity;

a capacitor embedded within the cavity, the capacitor comprising top and bottom vertically-spaced plates separated by capacitor dielectric material, one of the top or bottom capacitor plates electrically connected to the interconnect layer within the cavity, one of the top or bottom capacitor plates horizontally spaced from the edges defining the cavity; and

an electrical connector extending through one of the IMD layers contacting the interconnect layer, the electrical connector electrically connected to the other one of the top or bottom capacitor plates.

2. An IC as defined in claim 1, wherein:

the interconnect layer includes upper, middle and lower conductive layers formed of metal, the middle conductive layer being relatively thicker vertically than either the upper or lower conductive layers; and

the cavity is located principally within the middle conductive layer.

3. An IC as defined in claim 2 wherein the middle conductive layer includes aluminum which is subject to deformation under temperature changes due to thermal processing of the IC.

4. An IC as defined in claim 2 wherein:

the cavity extends through the middle conductive layer to the lower conductive layer; and

the lower conductive layer defines the lower extent of the cavity.

5. An IC as defined in claim 4, wherein:

the bottom capacitor plate is formed by a portion of the lower conductive layer extending between the cavity edges.

6. An IC as defined in claim 5 wherein:

the bottom capacitor plate is integral with the lower conductive layer.

7. An IC as defined in claim 5 wherein:

the top plate is located vertically below or at the level of the upper surface of the interconnect layer.

8. An IC as defined in claim 7 wherein;

the top plate is horizontally spaced from the upper and middle conductive layers at the cavity edges; and

further comprising;

an insulating fill material occupying the horizontal space between the top plate and the upper and middle conductive layers.

9. An IC as defined in claim 4 further comprising:

the top plate is horizontally spaced from the upper and middle conductive layers at the cavity edges; and

further comprising;

an insulating fill material occupying the horizontal space between the top plate and the upper and middle conductive layers.

10. An IC as defined in claim 4 wherein:

the electrical connector extending through the IMD layer and connected to the capacitor plate comprises a via interconnect.

11. An IC as defined in claim 10 further comprising:

a second interconnect layer in addition to the interconnect layer first aforesaid, the second interconnect layer contacting one of the IMD layers which contacts the first interconnect layer; and

wherein;

a second via interconnect in addition to the via interconnect first aforesaid which is connected to the capacitor plate, the second via interconnect extending through the same IMD layer as the first via interconnect, the second via interconnect electrically connected between the first and second interconnect layers; and

the first via interconnect extends between the first and second interconnect layers.

12. An IC as defined in claim 11 further comprising:

the first and second via interconnect are approximately the same length.

13. An IC as defined in claim 1, wherein:

a lower portion of the interconnect layer defines the lower extent of the cavity.

14. An IC as defined in claim 13 wherein:

the bottom capacitor plate is formed by a portion of the portion of the interconnect layer which defines the lower extent of the cavity.

15. An IC as defined in claim 14 wherein:

the bottom capacitor plate is integral with the portion of the interconnect layer which defines the lower extent of the cavity.

16. An IC as defined in claim 14 wherein:

the top plate is located vertically below or at the level of the upper surface of the interconnect layer.

17. An IC as defined in claim 14 wherein:

the top plate is horizontally spaced from the cavity edges; and

further comprising;

an insulating fill material occupying the horizontal space between the top plate and the upper and middle conductive layers.

18. An IC as defined in claim 13 wherein:

the electrical connector extending through the IMD layer and connected to the capacitor plate comprises a via interconnect.

19. An IC as defined in claim 18 further comprising:

a second interconnect layer in addition to the interconnect layer first aforesaid, the second interconnect layer contacting one of the IMD layers which contacts the first interconnect layer; and

wherein;

a second via interconnect in addition to the via interconnect first aforesaid which is connected to the capacitor plate, the second via interconnect extending through the same IMD layer as the first via interconnect, the second via interconnect electrically connected between the first and second interconnect layers; and

the first via interconnect extends between the first and second interconnect layers.

20. An IC as defined in claim 19 further comprising:

the first and second via interconnect are approximately the same