Electronic control unit calibration

• US 6,505,105 B2
• Filed: 01/05/2001
• Issued: 01/07/2003
• Est. Priority Date: 01/05/2001
• Status: Expired due to Fees

• Current Assignee: Delphi Technologies, Inc. (BorgWarner Incorporated)
• Original Assignee: Delphi Technologies, Inc. (BorgWarner Incorporated)
• Inventors: Allen, William James, Hay, Paul M., Lowden, Mark Thomas, McCormick, Ben Franklin, Gertiser, Kevin M.
• Primary Examiner(s): Picard, Leo
• Assistant Examiner(s): Masinick, Michael D.
• Application Number:
  US09/755,636
• Publication Number:
  US 20020091462A1
• Time in Patent Office: 732 Days
• Field of Search: 701/33, 701/29, 701/35, 701/114, 701/115, 123/399, 123/481, 123/436, 123/506, 123/458, 700/170, 700/177
• US Class Current: 701/33
• CPC Class Codes: G05B 19/0426 Programming the control sequence
• CPC Class Codes: G05B 2219/2637 Vehicle, car, auto, wheelchair

Abstract

An electronic control unit (ECU) includes a microcontroller, a first non-volatile memory bank, a second non-volatile memory bank and a volatile memory. The microcontroller is coupled to an external tool and executes a control algorithm, which controls a subsystem coupled to the ECU. The first non-volatile memory bank is coupled to the microcontroller and initially stores a plurality of initial calibration tables. The second non-volatile memory bank and the volatile memory are also coupled to the microcontroller. The microcontroller executes code, which calibrates the ECU without interrupting the normal operation of the subsystem.

Claims

1. A method of calibrating an electronic control unit (ECU), comprising the steps of:

providing a control algorithm for controlling a microcontroller of an ECU, the microcontroller including a port for coupling the microcontroller to an external tool, the microcontroller executing a control algorithm which controls a subsystem coupled to the ECU;

loading a plurality of initial calibration tables into a first non-volatile memory bank;

loading the plurality of initial calibration tables into a second non-volatile memory bank;

receiving an indication from the external tool as to which of the calibration tables loaded in the second non-volatile memory bank are to be modified;

loading the indicated calibration tables into a volatile memory;

receiving a replacement calibration constant from the external tool, the replacement calibration constant replacing an existing calibration constant located within one of the calibration tables in the volatile memory;

executing the control algorithm utilizing the replacement calibration constant and the calibration tables in the volatile memory that are required for a particular calibration routine;

receiving an indication that the calibration tables currently in the volatile memory are to be loaded into the second non-volatile memory bank; and

executing the control algorithm utilizing the calibration tables in the first non-volatile memory bank until the calibration tables in the volatile memory are loaded into the second non-volatile memory bank.

2. The method of claim 1, wherein the step of receiving an indication that the calibration tables currently in the volatile memory are to be loaded into the second non-volatile memory bank is provided in response to the receipt of a power-down request.

3. The method of claim 1, wherein the volatile memory provides a memory overlay for a portion of the second non-volatile memory bank.

4. The method of claim 3, wherein the step of receiving an indication that the calibration tables currently in the volatile memory are to be loaded into the second non-volatile memory bank is provided in response to a determination that a desired table in the second non-volatile memory bank cannot be accessed through the memory overlay.

5. The method of claim 1, wherein the volatile memory is a static random access memory and the first and second non-volatile memory banks are located within a dual-bank flash memory.

6. The method of claim 1, wherein the step of loading the plurality of initial calibration tables into the second non-volatile memory bank occurs at initialization.

7. The method of claim 1, wherein the volatile memory is a static random access memory and the first and second non-volatile memory banks are located within separate flash memories.

8. An electronic control unit (ECU), comprising:

a microcontroller including a port for coupling the microcontroller to an external tool, the microcontroller executing a control algorithm which controls a subsystem coupled to the ECU;

a first non-volatile memory bank coupled to the microcontroller, the first non-volatile memory bank initially storing a plurality of initial calibration tables;

a second non-volatile memory bank coupled to the microcontroller;

a volatile memory coupled to the microcontroller; and

microcontroller executable code for causing the microcontroller to perform the steps of;

loading the plurality of initial calibration tables into the second non-volatile memory bank;

receiving an indication as to which of the calibration tables loaded in the second non-volatile memory bank are to be modified;

loading at least one of the calibration tables into the volatile memory according to the received indication;

receiving a replacement calibration constant to replace an existing calibration constant located within one of the calibration tables in the volatile memory;

executing the control algorithm utilizing the replacement calibration constant and the calibration tables in the volatile memory when required for a particular calibration routine;

receiving an indication that the calibration tables currently in the volatile memory are to be loaded into the second non-volatile memory bank; and

executing the control algorithm utilizing the calibration tables in the first non-volatile memory bank until the calibration tables in the volatile memory are loaded into the second non-volatile memory bank.

9. The electronic control unit of claim 8, wherein the step of receiving an indication that the calibration tables currently in the volatile memory are to be loaded into the second non-volatile memory bank is provided in response to the receipt of a power-down request.

10. The electronic control unit of claim 8, wherein the volatile memory provides a memory overlay for a portion of the second non-volatile memory bank.

11. The electronic control unit of claim 10, wherein the step of receiving an indication that the calibration tables currently in the volatile memory are to be loaded into the second non-volatile memory bank is provided in response to a determination that a desired calibration table in the second non-volatile memory bank cannot be accessed through the memory overlay.

12. The electronic control unit of claim 8, wherein the volatile memory is a static random access memory and the first and second non-volatile memory banks are located within a dual-bank flash memory.

13. The electronic control unit of claim 8, wherein the step of loading the plurality of initial calibration tables into the second non-volatile memory bank occurs at initialization.

14. The electronic control unit of claim 8, wherein the volatile memory is a static random access memory and the first and second non-volatile memory banks are located within separate flash memories.

15. A microcontroller, comprising:

a port for coupling the microcontroller to an external tool, the microcontroller executing a control algorithm which controls a subsystem coupled to the microcontroller;

a first non-volatile memory bank coupled to the microcontroller, the first non-volatile memory bank initially storing a plurality of initial calibration tables;

a second non-volatile memory bank coupled to the microcontroller;

a volatile memory coupled to the microcontroller; and

microcontroller executable code for causing the microcontroller to perform the steps of;

loading the plurality of initial calibration tables into the second non-volatile memory bank;

receiving an indication as to which of the calibration tables loaded in the second non-volatile memory bank are to be modified;

loading at least one of the calibration tables into the volatile memory according to the received indication;

receiving a replacement calibration constant to replace an existing calibration constant located within one of the calibration tables in the volatile memory;

executing the control algorithm utilizing the replacement calibration constant and the calibration tables in the volatile memory when required for a particular calibration routine;

receiving an indication that the calibration tables currently in the volatile memory are to be loaded into the second non-volatile memory bank; and

executing the control algorithm utilizing the calibration tables in the first non-volatile memory bank until the calibration tables in the volatile memory are loaded into the second non-volatile memory bank.

16. The microcontroller of claim 15, wherein the step of receiving an indication that the calibration tables currently in the volatile memory are to be loaded into the second non-volatile memory bank is provided in response to the receipt of a power-down request.

17. The microcontroller of claim 15, wherein the volatile memory provides a memory overlay for a portion of the second non-volatile memory bank.

18. The microcontroller of claim 17, wherein the step of receiving an indication that the calibration tables currently in the volatile memory are to be loaded into the second non-volatile memory bank is provided in response to a determination that a desired calibration table in the second non-volatile memory bank cannot be accessed through the memory overlay.

19. The microcontroller of claim 15, wherein the volatile memory is a static random access memory (SRAM) and the first and second non-volatile memory banks are located within a dual-bank flash memory.

20. The microcontroller of claim 15, wherein the step of loading the plurality of initial calibration tables into the second non-volatile memory bank occurs at initialization.

21. The microcontroller of claim 15, wherein the volatile memory is a static random access memory and the first and second non-volatile memory banks are located within separate flash memories.