Dynamic addressing mapping to eliminate memory resource contention in a symmetric multiprocessor system
First Claim
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1. A dynamic address mapping method for eliminating contention to a memory resource of a symmetric multiprocessor system having a plurality of processors arrayed as a processing engine, the method comprising the steps of:
- providing a bank select mode that enables logical-to-physical address mapping operations by a first processor to select a bank of the memory resource storing a first data structure having short entries, each short entry comprising data accessible by the first processor at a particular location of the bank; and
providing a stream mode that enables logical-to-physical address mapping operations by a second processor to select a bank from among a plurality of banks of the memory resource storing a second data structure having long entries, each long entry comprising data accessible by the second processor at a plurality of locations among the plurality of banks, wherein the bank select and stream modes are simultaneously provided to the processors of the arrayed processing engine to thereby present a single contiguous address space for accessing particular memory locations as well as a plurality of memory locations within the memory resource.
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Abstract
A dynamic address mapping technique eliminates contention to memory resources of a symmetric multiprocessor system having a plurality of processors arrayed as a processing engine. The technique defines two logical-to-physical address mapping modes that may be simultaneously provided to the processors of the arrayed processing engine to thereby present a single contiguous address space for accessing individual memory locations, as well as memory strings, within the memory resources. These addressing modes include a bank select mode and a stream mode.
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Citations
20 Claims
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1. A dynamic address mapping method for eliminating contention to a memory resource of a symmetric multiprocessor system having a plurality of processors arrayed as a processing engine, the method comprising the steps of:
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providing a bank select mode that enables logical-to-physical address mapping operations by a first processor to select a bank of the memory resource storing a first data structure having short entries, each short entry comprising data accessible by the first processor at a particular location of the bank; and
providing a stream mode that enables logical-to-physical address mapping operations by a second processor to select a bank from among a plurality of banks of the memory resource storing a second data structure having long entries, each long entry comprising data accessible by the second processor at a plurality of locations among the plurality of banks, wherein the bank select and stream modes are simultaneously provided to the processors of the arrayed processing engine to thereby present a single contiguous address space for accessing particular memory locations as well as a plurality of memory locations within the memory resource. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20)
receiving address bits and mode select bits from the first processor at an address mapper; and
converts the received bits into interface select, bank select, row and column bits.
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19. The dynamic address mapping method of claim 18 wherein the step of providing a stream mode that enables logical-to-physical address mapping operations comprises the steps of:
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receiving address bits and mode select bits from the second processor at an address mapper; and
converts the received bits into interface select, bank select, row and column bits.
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20. The dynamic address mapping method of claim 19 wherein the first processor and the second processor are the same processor.
Specification
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Current AssigneeCisco Technology, Inc. (Cisco Systems, Inc.)
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Original AssigneeCisco Technology, Inc. (Cisco Systems, Inc.)
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InventorsPotter, Kenneth H.
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Primary Examiner(s)Yoo, Do Hyun
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Assistant Examiner(s)MCLEAN MAYO, KIMBERLY N
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Application NumberUS09/571,213Time in Patent Office966 DaysField of Search711/202, 711/205, 711/206, 711/207, 711/210, 711/212, 711/147, 711/150, 712/10, 712/11, 712/12, 712/22, 712/14, 712/16, 712/21, 712/19, 712/18, 709/200, 709/213, 709/400US Class Current711/202CPC Class CodesG06F 12/0284 Multiple user address space...G06F 12/06 Addressing a physical block...
