×

Method of fabrication based on solid-phase epitaxy for a MOSFET transistor with a controlled dopant profile

  • US 6,506,650 B1
  • Filed: 04/27/2001
  • Issued: 01/14/2003
  • Est. Priority Date: 04/27/2001
  • Status: Active Grant
First Claim
Patent Images

1. A method of controlling junction contour within a MOSFET device, comprising:

  • forming insulating material into a contoured L-shaped spacer adjacent a gate stack; and

    implanting a source-drain junction through the contoured L-shaped spacer to create a stepped junction contour and extended source-drain channel wherein the contoured L-shaped spacer is formed from an L-shaped spacer which is contoured to include reduced-height cutouts proximal the gate stack to control implantation profiling.

View all claims
  • 6 Assignments
Timeline View
Assignment View
    ×
    ×