Apparatus and method for recovering a clock signal for use in a portable data carrier

• US 6,507,607 B1
• Filed: 01/22/1998
• Issued: 01/14/2003
• Est. Priority Date: 01/30/1997
• Status: Expired due to Term

• Current Assignee: Google Technology Holdings LLC (Alphabet Inc.)
• Original Assignee: Motorola, Inc. (Motorola Solutions, Inc.)
• Inventors: Hill, Michael John
• Primary Examiner(s): TSE, YOUNG TOI
• Application Number:
  US09/012,085
• Time in Patent Office: 1,818 Days
• Field of Search: 375/219, 375/259, 375/316, 375/329, 455/571, 455/572
• US Class Current: 375/219
• CPC Class Codes: G06K 19/0723 the record carrier comprising an arrangement for non-contact communication, e.g. wireless communication circuits on transponder cards, non-contact smart cards or RFIDs
• CPC Class Codes: G06K 19/07769 the further communication means being a galvanic interface, e.g. hybrid or mixed smart cards having a contact and a non-contact interface
• CPC Class Codes: G06K 7/0008 General problems related to the reading of electronic memory record carriers, independent of its reading method, e.g. power transfer

Abstract

A portable data carrier includes a radio frequency (RF) receiving circuit tuned to receive power signals on a carrier frequency, f_c. The portable data carrier further includes a processor that uses a clock signal for operation thereof. A method of recovering the clock signal includes the steps of receiving timing information on a first sub-carrier frequency, f_s1, that is offset from f_c by a predetermined frequency. The timing information is then demodulated and the clock signal is extracted therefrom.

Claims

1. In a portable data carrier that includes a radio frequency (RF) receiving circuit tuned to receive power signals on a carrier frequency, f_c, the portable data carrier further including a processing element that requires a clock signal for operation thereof, a method comprising the steps of:

powering the processing element using the power signals;

receiving an information signal on a first sub-carrier frequency that is offset from f_c by a first predetermined frequency offset, f_s1, wherein the information signal includes timing information;

demodulating the timing information received, thereby producing demodulated timing information; and

generating the clock signal from the demodulated timing information.

2. The method of claim 1, wherein the step of generating comprises the step of inputting the demodulated timing information to a phase locked loop (PLL) circuit, the PLL circuit produces a stable reference signal.

3. The method of claim 2, further comprising the step of multiplying the stable reference signal by an integer multiple to produce the clock signal for use by the processing element.

4. The method of claim 1, wherein the first sub-carrier frequency is selected to be a non-integer harmonic of the clock signal.

5. The method of claim 1, wherein the processing element switches a data signal during operation, thereby producing a switching noise data signal that includes a quiet zone, the method further comprising the step of selecting f_s1 such that the first sub-carrier frequency falls substantially within a predetermined range of the quiet zone.

6. The method of claim 1, wherein an uplink (terminal to portable data carrier) information signal is transmitted on the first sub-carrier frequency, and a downlink (portable data carrier to terminal) information signal is transmitted on a second sub-carrier frequency that is offset from f_c by an amount equal to the sum of the first predetermined frequency offset f_s1 and a second predetermined frequency offset f_s2, wherein f_s2 comprises an integer multiple of f_s1.

7. A portable data carrier, comprising:

a first receiving circuit tuned to receive power signals on a carrier frequency f_c;

a processing element, having a power supply voltage terminal operably coupled to the first receiving circuit for receiving the power signals thereon, that requires a clock signal for operation thereof;

a second receiving circuit, operably coupled to the first receiving circuit and tuned to receive information signals on a first sub-carrier frequency that is offset from f_c by a first predetermined frequency offset, f_s1, the second receiving circuit providing both the clock signal and a plurality of data signals to the processing element.

8. The portable data carrier of claim 7, further comprising a transmitting circuit tuned to transmit the data signals on a second sub-carrier frequency that is offset from f_c by an amount equal to the sum of the first predetermined frequency offset f_s1 and a second predetermined frequency offset f_s2, wherein f_s2 comprises an integer multiple of f_s1.

9. The portable data carrier of claim 8, wherein the second receiving circuitry comprises a phase locked loop circuit and a multiplier.

10. In a portable data carrier comprising a processing element for processing a data signal, the processing element powered by a first power supply voltage and operable in response to a clock signal, a method comprising the steps of:

receiving a modulated signal;

forming the first power supply voltage from energy in a carrier frequency of the inodulated signal;

generating the clock signal in response to a sub-carrier frequency that is offset from a carrier frequency, f_c, by a predetermined offset, f_s1, of the modulated signal; and

recovering the data signal by demodulating a portion of the modulated signal at the sub-carrier frequency down to baseband.

11. The method of claim 10 wherein the step of receiving the modulated signal comprises the step of receiving the modulated signal using an antenna.

12. The method of claim 10 wherein the step of generating the clock signal comprises the step of generating the clock signal in response to a difference in frequency between the carrier frequency and the sub-carrier frequency.

13. The method of claim 10 wherein the step of generating the clock signal further comprises the step of generating the clock signal using a phase locked loop that uses the difference in frequency between the carrier frequency and the sub-carrier frequency as a reference frequency.