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Methods and circuits for testing a circuit fabrication process for device uniformity

  • US 6,507,942 B1
  • Filed: 07/11/2000
  • Issued: 01/14/2003
  • Est. Priority Date: 07/11/2000
  • Status: Expired due to Term
First Claim
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1. A method for measuring feature-size uniformity across a surface of a programmable logic device, wherein the programmable logic device is configurable using a collection of configurable elements to provide specified logic functions, the method comprising:

  • a. configuring a first set of the configurable elements in a first region of the programmable logic device to include a first oscillator, wherein the first oscillator oscillates at a first frequency that depends upon a first device having a first critical dimension;

    b. configuring a second set of the configurable elements in a second region of the programmable logic device to include a second oscillator, wherein the second oscillator oscillates at a second frequency that depends upon a second device having a second critical dimension;

    c. measuring a difference between the first and second frequencies to obtain a frequency difference; and

    d. correlating the frequency difference to an extent of feature-size uniformity, the greater the frequency difference, the less the feature-size uniformity.

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