Data processing method and apparatus, reticle mask, exposing method and apparatus, and recording medium

• US 6,507,944 B1
• Filed: 03/23/2000
• Issued: 01/14/2003
• Est. Priority Date: 07/30/1999
• Status: Expired due to Term

• Current Assignee: Fujitsu Semiconductor Limited (Fujitsu Limited)
• Original Assignee: Fujitsu Limited
• Inventors: Kikuchi, Kenji, Ilduka, Yoshimasa, Okada, Tomoyuki, Minemura, Masahiko
• Primary Examiner(s): Smith, Matthew
• Assistant Examiner(s): Kik, Phallaka
• Application Number:
  US09/533,663
• Time in Patent Office: 1,027 Days
• Field of Search: 716/1-21, 700/96, 700/97, 700/105, 700/120-121, 430/4-5, 378/34-35, 382/144
• US Class Current: 716/55
• CPC Class Codes: G03F 1/68 Preparation processes not covered by groups G03F1/20 - G03F1/50

Abstract

A data processing apparatus comprises a grid pattern area calculation section (24) for calculating the minimum grid and the present area of a circuit element for each layer of circuit patterns given by CAD data (1); an overlap area calculation section (25) for calculating an overlap area of present areas; and a composition/division optimization judgment section (26) for judging by a criterion whether the layers including the overlap area should be processed according to a single common grid or different grids. Each layer can be assigned the grid with the minimum accuracy required for the layer. A grid with more minute accuracy than it requires may not be used. Operation load in making reticle mask data and processing load in actually performing exposure or the like are thereby considerably relieved.

Claims

1. A data processing method for making reticle mask data from design data, comprising the steps of:

calculating a minimum grid and a present area of a circuit element for each of plural layers of circuit patterns given by said design data;

calculating an overlap area of present areas;

determining, on the basis of a result of said calculating steps, whether the layers, including each said overlap area, should be processed according to a single common grid or different grids; and

optimizing, based on a result of said determining step, a grid for each layer.

2. A method according to claim 1, further comprising the step of:

performing a logical operation based on processing parameters to data generated from said design data, on the basis of the grid optimized for each layer.

3. A method according to claim 1, wherein processing for calculating the minimum grid, the present area, and an overlap area, is performed to data generated by performing a logical operation based on processing parameters to said design data.

4. A method according to claim 1, further comprising the steps of:

obtaining a number of pixels of said overlap area using the grid that is a greatest common measure of the respective minimum grids for the layers including said overlap area;

obtaining a difference in pixels between a case of processing the layers with their individual minimum grids and a case of processing the layers with the grid of the greatest common measure; and

comparing the number of pixels of said overlap area and said difference in pixels to determine whether the layers including said overlap area should be processed according to the single common grid or different grids.

5. A method according to claim 1, wherein said step of optimizing the grid for each layer obtains a grid having a smallest total number of pixels, of all layers.

6. A data processing apparatus for making reticle mask data from design data, comprising:

a first operation section calculating a minimum grid and a present area of a circuit element for each layer of plural layers of circuit patterns given by said design data;

a second operation section calculating an overlap area of present areas; and

an optimization judgment section judging by a criterion whether the layers, including said overlap area obtained by said second operation section, should be processed according to a single common grid or different grids.

7. A reticle mask that is made in accordance with reticle mask data made from design data by the steps of:

calculating a minimum grid and a present area of a circuit element for each of plural layers of circuit patterns given by said design data;

calculating an overlap area of present areas;

determining on the basis of a result of said calculating steps, whether the layers, including each said overlap area, should be processed according to a single common grid or different grids; and

obtaining a grid for each layer to make said reticle mask data.

8. A computer-readable recording medium recording thereon a program to cause a computer to perform:

a process of calculating a minimum grid and a present area of a circuit element for each of plural layers of circuit patterns given by design data, and calculating an overlap area of present areas;

a process of determining whether the layers including said overlap area should be processed according to a single common grid or different grids, on the basis of the calculated minimum grid and present area and the calculated overlap area; and

a process of optimizing a grid for each layer on the basis of the determination result.