Method for forming storage node electrode using a polysilicon hard mask on a sacrificial insulation film

• US 6,509,244 B2
• Filed: 06/25/2001
• Issued: 01/21/2003
• Est. Priority Date: 06/30/2000
• Status: Expired due to Fees

• Current Assignee: Hynix Semiconductor Incorporated (SK Hynix Inc.)
• Original Assignee: Hynix Semiconductor Incorporated (SK Hynix Inc.)
• Inventors: Kim, Chang-Il, Oh, Chen-kwon
• Primary Examiner(s): Le, Vu A.
• Assistant Examiner(s): Owens, Beth E.
• Application Number:
  US09/888,908
• Publication Number:
  US 20020102807A1
• Time in Patent Office: 575 Days
• Field of Search: 438/386, 438/239, 438/387, 438/243, 438/244
• US Class Current: 438/386
• CPC Class Codes: H01L 28/60 Electrodes
• CPC Class Codes: H10B 12/033 the capacitor extending over the transistor
• CPC Class Codes: H10B 12/09 with simultaneous manufacture of the peripheral circuit region and memory cells

Abstract

A method for forming a storage node electrode of a semiconductor device, includes the steps of: forming a contact plug in an interlayer insulation film on a semiconductor substrate; sequentially stacking etch stop films, a sacrificial insulation film, a polysilicon hard mask and a reflection preventative film on the surface of the interlayer insulation film; forming an opening by etching the hard mask, the sacrificial insulation film and the etch stop films to remove the reflection preventative film to obtain a storage node electrode region; forming a storage node electrode by depositing a conductive material over the resultant structure; forming a filling film for filling up the opening; etching the filling film, the storage node electrode and the hard mask so that the hard mask has a predetermined thickness; and etching the resultant structure with a chemical mechanical polishing process so that the residual hard mask can be completely removed. Thus, the sacrificial insulation film is not excessively etched, thereby preventing an etch step of the sacrificial insulation film between a peripheral region and a cell region, and also obtaining a sufficient capacity of the storage node electrode.

Claims

1. A method for forming a storage node electrode of a semiconductor device, comprising the steps of:

forming a contact plug in an interlayer insulation film on a semiconductor substrate where a predetermined device structure has been formed;

sequentially stacking at least one etch stop film, a sacrificial insulation film, a polysilicon hard mask and a reflection preventative film on the surface of the interlayer insulation film where the contact plug has been formed;

removing the reflection preventative film while forming an opening by etching the hard mask, the sacrificial insulation film and the at least one etch stop films to obtain a storage node electrode region;

forming a storage node electrode by depositing a conductive material over the hard mask and formed opening;

forming a filling film for filling up the opening to provide a resultant structure;

etching the resultant structure so that the hard mask has a predetermined thickness; and

subsequently performing a chemical-mechanical polishing process to completely remove the hard mask.

2. The method of claim 1, further comprising forming a plurality of etch stop films before forming the storage node electrode.

3. The method of claim 1, wherein the step of etching the resultant structure is carried out with a fluorine or chlorine solution and the predetermined thickness of the hard mask is less than 500 Å

.

4. The method according to claim 1, wherein the chemical-mechanical polishing process used to completely remove the hard mask is performed by using an abrasive of a size ranging from about 50 to about 300 nm and at a pH ranging from about 6 to about 11.