High-voltage high-speed SOI MOSFET
First Claim
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1. An silicon-on-insulator semiconductor device comprising:
- an silicon-on-insulator substrate including at least an active region disposed on an electrically insulating region;
a plurality of diffusion regions in said active region, separated by, and abutting a plurality of body regions in said substrate, a first one of the body regions and its abutting diffusion regions having a first width and successive ones of the body regions and their abutting diffusion regions having successively smaller widths; and
a plurality of gate conductors each over one of the plurality of body regions and separated from the body regions by a dielectric material, wherein said plurality of gate conductors and said dielectric have an aspect ratio in terms of gate conductor length to dielectric material thickness of from about 10;
1 to about 30;
1, and wherein said silicon-on-insulator semiconductor device has a drain-to-source breakdown voltage of at least approximately 2.5V.
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Abstract
A semiconductor device including an SOI substrate; a plurality of diffusion regions in substrate, separated by, and abutting a plurality of body regions in said substrate, a first one of the body regions and its abutting diffusion regions having a first width and successive ones of the body regions and their abutting diffusion regions having successively smaller widths; and a plurality of gates each over one of the plurality of body regions and separated from the body regions by a dielectric material, said plurality of gates connected to a common voltage terminal.
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Citations
12 Claims
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1. An silicon-on-insulator semiconductor device comprising:
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an silicon-on-insulator substrate including at least an active region disposed on an electrically insulating region;
a plurality of diffusion regions in said active region, separated by, and abutting a plurality of body regions in said substrate, a first one of the body regions and its abutting diffusion regions having a first width and successive ones of the body regions and their abutting diffusion regions having successively smaller widths; and
a plurality of gate conductors each over one of the plurality of body regions and separated from the body regions by a dielectric material, wherein said plurality of gate conductors and said dielectric have an aspect ratio in terms of gate conductor length to dielectric material thickness of from about 10;
1 to about 30;
1, and wherein said silicon-on-insulator semiconductor device has a drain-to-source breakdown voltage of at least approximately 2.5V.- View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
a first one of said plurality of diffusion regions at said first end has a first depth; - and
a second one of said plurality of diffusion regions at said second end has a second depth different from said first depth.
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Specification