Printed circuit board arrangement

• US 6,515,222 B2
• Filed: 02/05/2001
• Issued: 02/04/2003
• Est. Priority Date: 02/05/2001
• Status: Active Grant

• Current Assignee: Google Technology Holdings LLC (Alphabet Inc.)
• Original Assignee: Motorola, Inc. (Motorola Solutions, Inc.)
• Inventors: Underwood, Jeffrey A., Swirbel, Thomas J., Arledge, John K., Barreto, Joaquin
• Primary Examiner(s): Reichard, Dean A.
• Assistant Examiner(s): OLIVA, CARMELO B
• Application Number:
  US09/775,460
• Publication Number:
  US 20020104669A1
• Time in Patent Office: 729 Days
• Field of Search: 174/35.R, 174/255, 174/256, 174/157, 174/258, 174/250, 361/816, 361/818, 296/00, 298/25
• US Class Current: 174/394
• CPC Class Codes: H01L 2223/6622 Coaxial feed-throughs in active or passive substrates
• CPC Class Codes: H05K 1/0218 by printed shielding conductors, ground planes or power plane H05K1/0236 takes precedence
• CPC Class Codes: H05K 1/0221 Coaxially shielded signal lines comprising a continuous shielding layer partially or wholly surrounding the signal lines
• CPC Class Codes: H05K 1/0222 for shielding around a single via or around a group of vias, e.g. coaxial vias or vias surrounded by a grounded via fence
• CPC Class Codes: H05K 1/113 Via provided in pad; Pad over filled via
• CPC Class Codes: H05K 2201/0715 provided by an outer layer of PCB
• CPC Class Codes: H05K 2201/09036 Recesses or grooves in insulating substrate recess in metallic substrate H05K2201/09745
• CPC Class Codes: H05K 2201/09509 Blind vias, i.e. vias having one side closed
• CPC Class Codes: H05K 2201/09809 Coaxial layout reduction of cross-talk, noise or interference by printed shielding conductors for shielding around a single via or around a group of vias H05K1/0222
• CPC Class Codes: H05K 2201/09972 Partitioned, e.g. portions of a PCB dedicated to different functions; Boundary lines therefore; Portions of a PCB being processed separately or differently
• CPC Class Codes: H05K 2201/09981 Metallised walls
• CPC Class Codes: H05K 2201/10553 Component over metal, i.e. metal plate in between bottom of component and surface of PCB
• CPC Class Codes: H05K 2201/10969 Metallic case or integral heatsink of component electrically connected to a pad on PCB
• CPC Class Codes: H05K 3/4644 by building the multilayer layer by layer, i.e. build-up multilayer circuits making via holes in the insulating layers H05K3/0011; special circuit boards as base or core whereon the multilayer is built H05K3/4602
• CPC Class Codes: H05K 9/0039 Galvanic coupling of ground layer on printed circuit board [PCB] to conductive casing printed shielding conductors, ground planes or power planes for reduction of cross-talk or noise in printed circuits H05K1/0218
• CPC Class Codes: Y10T 29/49117 Conductor or circuit manufacturing
• CPC Class Codes: Y10T 29/4913 Assembling to base an electrical component, e.g., capacitor, etc.
• CPC Class Codes: Y10T 29/49144 by metal fusion
• CPC Class Codes: Y10T 29/49155 Manufacturing circuit on or in base
• CPC Class Codes: Y10T 29/49156 with selective destruction of conductive paths

Abstract

Methods and apparatus for forming a metal shield on a printed circuit board (10) include a layer of dielectric material (23) one or more printed circuits (21) on the layer of dielectric material (23), a layer of metal (27) on the layer of dielectric material (23), a metal-clad trench or opening surrounding the printed circuit (44) and electrically connected to the layer of metal(27), a solder pad (24) on the layer of dielectric material (23), a microvia (25) through the solder pad (24) and the layer of dielectric material (23), and electrical components (11) soldered to the solder pads (24) and to the printed circuit (21).

Claims

1. A printed circuit board arrangement comprising:

a substrate;

a printed circuit deposited directly on said substrate;

a layer of dielectric material covering said substrate and said printed circuit;

a layer of metal deposited on said layer of dielectric material; and

a metal clad opening surrounding said printed circuit, said metal clad opening being electrically connected to said layer of metal.

2. The printed circuit board arrangement of claim 1, including a gap in said metal clad opening.

3. The printed circuit board arrangement of claim 1, including an opening in said layer of metal and a solder pad located within said opening, said solder pad being electrically isolated from said metal layer and a small hole through said solder pad extending to said printed circuit.

4. The printed circuit board arrangement of claim 3, including an electrical component soldered to said solder pad and electrically connected to said printed circuit.

5. A printed circuit board arrangement comprising:

a substrate;

a first layer of metal on said substrate;

a first layer of dielectric material on said first layer of metal;

at least two printed circuits on said first layer of dielectric material;

a second layer of dielectric material on said first dielectric layer and on said at least two printed circuits;

a second layer of metal on said second layer of dielectric material; and

a metal clad opening surrounding said at least two printed circuits and electrically connected to said first and second layers of metal.

6. The printed circuit board arrangement of claim 5, including a gap in said metal clad opening.

7. The printed circuit board arrangement of claim 5, including at least a third printed circuit between said first and second layers of dielectric material, and a second metal clad opening between said at least two printed circuits and said at least a third printed circuit, said second metal clad opening being electrically connected to said metal clad opening.

8. The printed circuit board arrangement of claim 5, including an opening in said second layer of metal, a solder pad located therewithin and electrically isolated from said second metal layer and a microvia through said solder pad extending to a first printed circuit of said at least two printed circuits.

9. The printed circuit board arrangement of claim 8, including an electrical component soldered to said solder pad and electrically connected to said first printed circuit.

10. A printed circuit board arrangement comprising:

an insulating substrate;

a plurality of printed circuits on said insulating substrate;

a layer of dielectric material covering said insulating substrate and said plurality of printed circuits;

a layer of metal deposited on said layer of dielectric material; and

a metal clad opening surrounding said plurality of printed circuits, said metal clad opening being electrically connected to said layer of metal.

11. The printed circuit board arrangement of claim 10, including an opening in said layer of metal and a solder pad located within said opening, said solder pad being electrically isolated from said metal layer and a microvia through said solder pad extending to a first printed circuit of said plurality of printed circuits.

12. The printed circuit board arrangement of claim 11, including an electrical component soldered to said solder pad and electrically connected to said first printed circuit.