Methods to control the threshold voltage of a deep trench corner device

• US 6,518,145 B1
• Filed: 08/06/1998
• Issued: 02/11/2003
• Est. Priority Date: 08/06/1998
• Status: Expired due to Fees

• Current Assignee: Qimonda AG (Infineon Technologies AG), International Business Machines Corporation
• Original Assignee: International Business Machines Corporation, Siemens AG
• Inventors: Parries, Paul C., Goth, George R., OʼNeill, James A., Nastasi, Victor R., Levy, Max G., Alsmeier, Johann
• Primary Examiner(s): Chaudhuri, Olik
• Assistant Examiner(s): Blum, David S.
• Application Number:
  US09/130,226
• Time in Patent Office: 1,650 Days
• Field of Search: 438/421, 438/424, 438/425, 438/432, 438/435
• US Class Current: 438/425
• CPC Class Codes: H01L 21/763 Polycrystalline semiconductor regions H01L21/76264 takes precedence
• CPC Class Codes: H01L 21/823481 isolation region manufacturing related aspects, e.g. to avoid interaction of isolation region with adjacent structure

Abstract

A method of manufacturing a semiconductor trench device comprises forming a dielectric on a substrate, the dielectric having an underlying oxide layer adjacent the substrate, etching a trench in the dielectric and the substrate, forming a recess in the underlying oxide layer, filling the recess with a nitride plug, filling the trench a conductive material and oxidizing the dielectric and the conductive material, wherein the nitride plug controls a shape of a corner of the trench.

Claims

1. A method of manufacturing a semiconductor trench device comprising:

forming a dielectric on a substrate, said dielectric having an underlying oxide layer adjacent said substrate;

etching a trench in said dielectric and said substrate;

forming a recess in said underlying oxide layer;

filling said recess with a nitride plug;

filling said trench with a conductive material; and

oxidizing said dielectric and said conductive material, wherein said nitride plug controls a shape of a trench corner of said trench.

2. The method as in claim 1, wherein said step of forming said dielectric comprises a step of forming a nitride layer and a top oxide layer, successively, on said underlying oxide layer.

3. The method as in claim 1, wherein said step of forming said dielectric comprises a step of forming a nitride layer on said underlying oxide layer.

4. The method as in claim 1, wherein said step of etching said trench allows a passivating film to remain on sidewalls of said trench, said method further comprising a step of removing said passivating film, wherein said removing step forms said recess in said underlying oxide layer.

5. The method as in claim 1, wherein said step of filling said recess with said nitride plug comprises steps of lining said trench with a nitride film and removing said nitride film from said trench, such that said nitride plug remains in said recess.

6. The method as in claim 1, wherein said step of filling said trench with said conductive material comprises steps of:

filling a first area of said trench below said underlying oxide layer with said conductive material;

lining a second area of said trench above said first area with a collar oxide layer; and

filling said second area with said conductive material.

7. The method as in claim 1, further comprising, after said oxidizing step, a step of forming a gate oxide and gate conductor over said substrate and said conductive material.

8. The method as in claim 1, wherein said trench device includes a channel bounded by said trench corner, said nitride plug controlling said shape of said trench corner, such that a threshold voltage of said trench corner matches a threshold voltage of said channel.

9. The method as in claim 1, wherein said nitride plug limits oxidation of said trench corner.

10. A method of manufacturing a semiconductor trench device comprising:

forming a dielectric, comprising an underlying oxide layer, a nitride layer and a top oxide layer, on a substrate;

etching a trench in said dielectric and said substrate, wherein said etching step allows a passivating film to remain on sidewalls of said trench;

removing said passivating film such that a recess is formed in said underlying oxide layer;

lining a first area of said trench below said underlying oxide layer with a sacrificial oxide layer;

covering said sacrificial oxide layer with a nitride film and filling said recess with said nitride film;

filling said first area with a conductive material;

removing said nitride film and said sacrificial oxide layer from a second area of said trench above said conductive material, such that a nitride plug remains in said recess;

lining said second area of said trench with a collar oxide layer;

filling said second area with said conductive material;

oxidizing said dielectric, said collar oxide and said conductive material; and

forming a gate oxide and gate conductor over said substrate and said conductive material, such that a channel is bounded by a trench corner of said trench,

wherein said nitride plug controls a shape of said trench corner, such that a threshold voltage of said trench corner matches a threshold voltage of said channel.