Probe card

• US 6,518,779 B1
• Filed: 10/19/1998
• Issued: 02/11/2003
• Est. Priority Date: 10/20/1997
• Status: Expired due to Term

• Current Assignee: Adeia Semiconductor Advanced Technologies Inc. (f/k/a Tessera Advanced Technologies, Inc.) (Adeia Inc.)
• Original Assignee: Matsushita Electric Industrial Company Limited (Panasonic Holdings Corporation)
• Inventors: Ishizaka, Masaaki, Oki, Shinichi, Nakata, Yoshiro
• Primary Examiner(s): Nguyen, Vinh P.
• Application Number:
  US09/174,536
• Time in Patent Office: 1,576 Days
• Field of Search: 324/754, 324/755, 324/761, 324/765, 439/482, 438/14, 438/17, 438/18
• US Class Current: 324/756.03
• CPC Class Codes: G01R 1/07314 the body of the probe being perpendicular to test object, e.g. bed of nails or probe with bump contacts on a rigid support on an elastic support, e.g. a film, G01R1/0735

Abstract

A probe card is used in testing an electric characteristic of plural semiconductor chips formed on a semiconductor wafer in a batch at a wafer level through application of a voltage to electrodes of the semiconductor chips. The probe card includes a card body, plural probe terminals, a wiring and a control element. The plural probe terminals are disposed on one surface of the card body in positions corresponding to the electrodes of the semiconductor chips. The wiring is disposed on the other surface of the card body and electrically connected with the probe terminals. The control element is disposed on the latter surface of the card body between the wiring and the probe terminals and controls input/output of the semiconductor chips.

Claims

1. A probe card for use in simultaneous testing an electrical characteristic of plural semiconductor chips formed on a semiconductor wafer in a batch at a wafer level by applying a voltage to electrodes of said plural semiconductor chips, comprising:

a card body;

plural probe terminals disposed on a first surface of said card body in positions respectively corresponding to each of said electrodes of said semiconductor chips;

a wiring disposed on a second surface of said card body;

plural control means disposed on the second surface of said card body; and

plural contacts penetrating said first surface and said second surface, and are included in said card body,

wherein said wiring is electrically connected to each said probe terminals via said plural control means and contacts.

2. The probe card of claim 1,

wherein said wiring is a voltage supply line for supplying a voltage to said probe terminals via through holes formed in said card body and

said control means includes a driver circuit device.

3. The probe card of claim 1,

wherein said wiring is a voltage supply line for supplying a voltage to said probe terminals via through holes formed in said card body and

said control means includes a testing function circuit device.

4. The probe card of claim 1,

wherein said wiring is a voltage supply line for supplying a voltage to said probe terminals via through holes formed in said card body and

said control means includes a frequency multiplying circuit device.

5. The probe card of claim 1,

wherein said wiring is a data output line for receiving output from said probe terminals via through holes formed in said card body and

said controls means includes a signal compressing circuit device.

6. The probe card of claim 1,

wherein said control means includes a capacitance device disposed in paralell to said wiring.

7. The probe card of claim 1,

wherein said wiring is a voltage supply line for supplying a voltage to said probe terminals via through holes formed in said card body and

said control means includes a current limiting device.