Flat display panel having internal power supply circuit for reducing power consumption

• US 6,522,314 B1
• Filed: 01/26/1998
• Issued: 02/18/2003
• Est. Priority Date: 11/19/1993
• Status: Expired due to Fees

• Current Assignee: Hitachi Consumer Electronics Company Limited (Hitachi, Ltd.)
• Original Assignee: Fujitsu Limited
• Inventors: Tomio, Shigetoshi, Matsui, Naoki, Yao, Shinpei
• Primary Examiner(s): Hjerpe, Richard
• Assistant Examiner(s): Dinh, Duc Q
• Application Number:
  US09/013,538
• Time in Patent Office: 1,849 Days
• Field of Search: 345/60, 345/68, 345/211, 345/63, 345/212
• US Class Current: 345/68
• CPC Class Codes: G09G 2300/0426 Layout of electrodes and connections
• CPC Class Codes: G09G 2300/0439 Pixel structures
• CPC Class Codes: G09G 2310/063 Waveforms for resetting the whole screen at once
• CPC Class Codes: G09G 2330/02 Details of power systems and of start or stop of display operation
• CPC Class Codes: G09G 2330/021 Power management, e.g. power saving
• CPC Class Codes: G09G 2330/022 in absence of operation, e.g. no data being entered during a predetermined time
• CPC Class Codes: G09G 2330/04 Display protection
• CPC Class Codes: G09G 3/20 for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
• CPC Class Codes: G09G 3/288 using AC panels
• CPC Class Codes: G09G 3/2927 Details of initialising
• CPC Class Codes: G09G 3/294 for lighting or sustain discharge
• CPC Class Codes: G09G 3/296 Driving circuits for producing the waveforms applied to the driving electrodes
• CPC Class Codes: G09G 3/2965 using inductors for energy recovery
• CPC Class Codes: G09G 3/297 using opposed discharge type panels

Abstract

A flat display employs a high voltage different from logic voltages and has a voltage detection unit and a drive control signal control unit. The voltage detection unit detects the high voltage and the drive control signal control unit controls drive control signals of the flat display in accordance with the detected high voltage. This arrangement eliminates charging currents which normally are applied to a display panel but are unrelated to the actual displaying of data and also reactive currents caused by unnecessary switching operations, thereby reducing power consumption.

Claims

1. A flat plasma display, driven by drive signals and employing at least one high voltage for supplying a sustain pulse, comprising:

a voltage detection unit detecting said high voltage; and

a drive control signal control unit controlling drive control signals of said flat plasma display in response to said detected high voltage, the sustain pulse for the flat plasma display being stopped by the drive control signals.

2. A flat plasma display as claimed in claim 1, wherein said flat plasma display further comprises:

an internal power supply circuit; and

an internal power supply controlling unit producing power supply control signals controlling an operation of said internal power supply circuit.

3. A flat plasma display as claimed in claim 2, wherein said internal power supply controlling unit controls an operation of said internal power supply circuit by changing said power supply control signals in response to said detected high voltage.

4. A flat plasma display as claimed in claim 2, wherein said drive control signal control unit controls an operation of a display panel driving unit by changing said drive control signals in response to said detected high voltage.

5. A flat plasma display as claimed in claim 2, wherein said drive control signal control unit and said internal power supply controlling unit stop operating if said detected high voltage is below a specific value set in said flat plasma display and start operating if said detected high voltage reaches said specific value, and thereby the drive control signals are controlled in response to changes in said detected high voltage.

6. A flat plasma display as claimed in claim 5, wherein said drive control signal control unit and said internal power supply controlling unit store at least first and second specific values to be compared with said detected high voltage, said first specific value being used when said high voltage is rising and said second specific value being used when said high voltage is falling.

7. A flat plasma display as claimed in claim 1, wherein said flat plasma display comprises a three-electrode surface discharge AC plasma display.

8. A flat plasma display as claimed in claim 7, wherein said three-electrode surface discharge AC plasma display comprises:

first and second electrodes arranged in parallel with each other; and

third electrodes orthogonal to said first and second electrodes, said first electrodes being commonly connected together and said second electrodes being arranged to define respective display lines, wherein said display has a surface discharge structure employing wall charges as a memory.

9. A flat plasma display as claimed in claim 8, wherein said three-electrode surface discharge AC plasma display further comprises:

a first substrate, said first and second electrodes being arranged in parallel to each other on said first substrate and paired for defining respective display lines;

a second substrate spaced apart from and facing said first substrate, defining a cavity therebetween, said third electrodes being arranged on said second substrate in orthogonal relationship to said first and second electrodes and displaced therefrom;

wall charge accumulating dielectric layers respectively covering the surfaces of said first and second electrodes;

a phosphor formed over said second substrate;

a discharge gas sealed in the cavity between said first and second substrates; and

cells formed at intersections where said first and second electrodes cross said third electrodes.

10. A flat plasma display, comprising:

a display data checking unit checking display data input to said flat plasma display from an external source; and

a drive control signal control unit controlling drive control signals of said flat plasma display in accordance with said checked display data, a sustain pulse for the flat plasma display being stopped by the drive control signals.

11. A flat plasma display as claimed in claim 10, wherein said flat plasma display further comprises:

an internal power supply circuit; and

an internal power supply controlling unit producing power supply control signals controlling an operation of said internal power supply circuit.

12. A flat plasma display as claimed in claim 11, wherein said internal power supply controlling unit controls an operation of said internal power supply circuit by changing said power supply control signals in response to the checked result of said display data.

13. A flat plasma display as claimed in claim 11, wherein said drive control signal control unit controls an operation of a display panel driving unit by changing said drive control signals in response to the checked result of said display data.

14. A flat plasma display as claimed in claim 11, wherein said drive control signal control unit and said internal power supply controlling unit stop operating if said display data is not input to said flat plasma display during a specific period, and start operating if said display data is input to said flat plasma display, and thereby the drive control signals are controlled in response to the checked result of said display data.

15. A flat plasma display as claimed in claim 11, wherein said flat plasma display comprises a three-electrode surface discharge AC plasma display.

16. A flat plasma display as claimed in claim 15, wherein said three-electrode surface discharge AC plasma display further comprises:

first and second electrodes arranged in parallel with each other; and

third electrodes orthogonal to said first and second electrodes, said first electrodes being commonly connected together and said second electrodes being arranged to define respective display lines, wherein said display has a surface discharge structure employing wall charges as a memory.

17. A flat plasma display as claimed in claim 16, wherein said three-electrode surface discharge AC plasma display further comprises:

a first substrate, said first and second electrodes being arranged in parallel to each other on said first substrate and paired for defining respective display lines;

a second substrate spaced apart from and facing said first substrate, defining a cavity therebetween, said third electrodes being arranged on said second substrate in orthogonal relationship to said first and second electrodes and displaced therefrom;

wall charge accumulating dielectric layers respectively covering the surfaces of said first and second electrodes;

a phosphor formed over said second substrate;

a discharge gas sealed in the cavity between said first and second substrates; and

cells formed at intersections where said first and second electrodes cross said third electrodes.